SU1509946A1 - Device for nonlinear correction of discrete signals - Google Patents

Abstract

The invention relates to computing and automation. The purpose of the invention is to expand the functionality by obtaining adjustable amplitude and phase characteristics of the correction, depending on the signal size. The device contains input 1, bus 2 reference voltage, adder 3, second comparator 4, keys 5-8, element NOT 9, RS - trigger 10, integrator 11, inverter 12, comparator 13, element NOT 14, clock bus 15, output 16. In the device, a sequence of triangular pulses is added to the step input signal recorded at the clock points in time, the sign, duration and amplitude of which are determined by the level of the input signal. 1 il.

Description

one

T21) 4315779 / 24-2A

(22) 10/13/87

(46) 09/23/89. Bksh. No. 35

(71) Leningrad Polytechnic Institute. M.I. Kalinina

(72) S.A. Konchin (SU) and Zhang An-Nn (CN)

(53) 681.3 (088.8)

(56) Nonlinear correction devices in automatic control systems. EP Popova and Yu.I. Topcheeva, Mechanical Engineering, 1971, p. 268-271.

Besekersky V.A. Digital automatic systems 1, Science, 1976, p. 86

(54) DEVICE FOR NONLINEAR CORE, RECORD OF A DISCRETE SIGNAL

(57) The invention relates to computing and automation. The purpose of the invention is to expand the functional capabilities by obtaining adjustable amplitude and phase correction characteristics, depending on the signal size. The device contains input 1, bus 2 reference voltage, adder 3, second comparator 4, keys 5-8, element NOT 9, RS flip-flop 10, integrator-11, inverter 12, comparator 13, element NOT 14, clock bus 15 and output 16. In the device, a sequence of triangular pulses is added to the step input signal fixed at the clock points in time, the sign, duration and amplitude of which are determined by the level of the input signal. 1 il.

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The invention relates to computing technology and automation.

The purpose of the invention is to expand the functionality by obtaining adjustable amplitude and phase characteristics of the correction, depending on the signal size.

The drawing shows a diagram of the device.

The device contains input 1, bus 2 reference voltage, adder 3, second comparator 4, keys (first to fourth) 5-8, element HE 9, RS flip-flop 0, integrator P, inverter 12, first comparator 13, element NOT 14, clock bus 15, output 16.

The device works as follows

Input I receives input signal values that are fixed at clock points in time. In the device, in addition to the piecewise constant (stepped) signal, triangular pulses are generated. Their beginning coincides with clock points in time, the slope is determined by the reference voltage (and can be adjusted), the pulse duration is proportional to the input signal, and the sign coincides with the sign of the input signal. Upon arrival at the R-input of the trigger 10, the integrator, 11 switches to the integration mode of the reference voltage. Depending on the sign of the input signal, a linearly increasing voltage or a linearly decreasing voltage is fed through one of the keys 5 and 7 to the input of the comparator 13, where it is compared with the input voltage. When it reaches the input voltage level, trigger 10 stops integrating.

As a result, the tekkup; its average value of the signal at the output of the device acquires an additional (nonlinear) component, proportional to the square of the input signal.

Claims (1)

Invention Formula A device for nonlinear correction of a discrete signal, comprising an integrator, the output of which is connected to the input of the inverter, and an adder, the output of which is an output of the device, characterized in that, in order to extend the functionality by obtaining adjustable amplitude and phase characteristics of the correction, from the signal size, two comparators, two NOT elements, four keys and an RS flip-flop are entered into it, and the device input is connected to the first inputs of the adder and the first comparator and to the input of the second The comparator, the output of which is connected to the control inputs of the first and second keys and through the first element NOT to the control inputs of the third and fourth keys, the information input of the integrator is connected to the reference voltage bus, the integrator output through the first key and the output of the inverter through the third key connected to the second input of the adder and the second input of the first comparator, the output of which is through the second key, as well as through the serially connected second element NOT and the fourth key is connected to the S input of the RS flip-flop, the R input of which About connected to the clock, bus, and the output - to the reset input of the integrator.