SU1705802A1 - Binary control system - Google Patents

Abstract

The invention relates to an automatic control and regulation technique and is intended for the automatic control of the forced movement of multi-stage dynamic objects, the parameters of which within the limits of the stage vary arbitrarily in an uncontrolled manner within any limited limits. The aim of the invention is to expand the functionality of the system by controlling objects with a time-varying piecewise-constant task with an unknown duration of piecewise-constant intervals. The system contains a control object 1, a set of 2 setters, a faded 3 comparisons, differentiators 4, first, second and third amplifiers 5, 8, 9, first, second and third adders 10, 6 and 11. modular elements 7, relay element 12, inertial filter 13, first and second multipliers 14 and 15 threshold comparison element 16, pulse generator 17, first and second counters 18 and 23, first and second decoders 19 and 24, AND unit 20, OR element 21. Delay element 22. The identification of the stage of an object is carried out by a threshold element of comparison 16. by a counter 23, a decoder 24 by analyzing the measured phase coordinates of the object. In this case, the decoder 24 generates a logical signal for the restructuring of the block 2 setters. 2 Il. yo

Description

The invention relates to an automatic control and regulation technique and is intended for the automatic control of the forced movement of linear multi-stage dynamic objects, the parameters of which within a stage change in an arbitrarily uncontrolled manner within any limited limits.

The invention is focused on multistage objects, the dynamics of which are described by the equation

-Vf

Yn (t) + an (t) (t) + ... + ai (t) Y (t) - U (YjS ((1)

where Yj is the driving force on the j-th StahD O SL 00

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variable parameters with fine ranges change

AG-Sra.M- ai 1. i -v; 1, p (3) where ar - known constants.

The goal of control and ensuring for each stage is equal to oa V (t) Yf (t), i.e. in the reduction to zero of the regulation error, aeolimetropic PM of the city of shale X (tj Vj (t) - Y (t)

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. d. i extensions: wz; .. nosgey of the system for c.che vpraI; flax objects with; y and g temechi piecewise constant .h with nonkestny duration of koso-i io-iootoy ;: intervals.

I ate. ;:; the chain is achieved by the fact that r si ;: l ;; p ksktsuyu consistently eopdins-1 .- gn ps; v: cy.v., first smart-j-i r «: t, / xV1. n, -g1vls1 1 -,. h and the block is compared to n-i. i. you ..0.0. to the switchboard is connected to the inputs .-., -1: n; oro.- groups, of which and the output of the comparison unit are connected through the corresponding amplifiers of the first group to the inputs of the second adder and through the corresponding modular elements

groups to the inputs of the corresponding amplifiers of the second and third groups, the outputs of which are connected to the inputs of the first and third adders, respectively, the output of the second adder is connected to the input of the relay element connected by the output to the input of the inertial filter, the output of which is connected to the second input of the first intelligent switch and the first the input of the second multiplier, the second input of which is connected to the output of the third adder, and the output connected to the corresponding input of the second adder, introduced a delay element connected in series comparison threshold element, pulse generator,

the first counter, the decoder, the AND block, the OR element, the second counter, the second decoder, and the loop setpoint block connected to the entrance to the summing input of the reference block, the output of which

connected to the signal input of the comparison threshold element connected by the output to its blocking input, the output of the OR element is connected to the blocking input of the pulse generator, the zeroing input of the first counter and through the delay element to the unlocking input of the comparison threshold element, the group of outputs of the second decoder AND.

Figure 1 shows a block diagram of a closed control system; in fig. 2 - the proposed control system.

The system contains (Fig. 1) a control object 1, a setpoint adjuster unit 2 with an output signal YjS (t) aj, j 1, k, and a regulator 3 of the coordinate feedback circuit (CBS). control signal U (t), block

4 detection of the boundaries of the stages, forming a logical signal j and forming with the setpoint adjuster unit 2 the contour of the coordinate-structural feedback (COS), the setpoint adjuster 5 of the coordinate-parametric contour

feedback (KPOS) with the output signal Xs (t), the controller b contour KPOS, forming the signal / f), the regulator 7 contour of the parametric feedback (POS), forming the signal -b (t). defining

dynamic setting operator 5. When using CBS. KPOS and POS get a scheme with elements 1-3, 5-7. In such systems, it is not possible to control the class of an object with variable

time piecewise constant task. In addition, the unknown duration of piecewise constant intervals does not allow the use of a programmable tunable sensor unit for solving the problem. In this connection, the contour of the coordinate and structural feedback (COS) is introduced into the system, which is intended to rebuild the setpoint adjuster depending on the stage of the object. The identification of the object stage is carried out by the stage boundary detection unit 4 by analyzing the measured phase coordinates of the object and generating a logical signal j to rearrange the setpoint generator. As a result of the introduction into the KSOS system, the scheme shown in Fig. 1 is obtained.

The system (FIG. 2) contains an object 1 of control, a block 2 of control devices of the CBS circuit, a regulating signal Yj (t), a block 3 of comparison, differentiators 4, first amplifiers 5, second adder 6, modular elements 7, second and third amplifiers 8 and 9, first and third adders 10 and 11, relay element 12, inertial filter 13, first and second multipliers 14 and 15, comparison threshold element 16, pulse generator 17, first counter 18. first decoder 19. block of elements AND, element OR 21. delay element 22, second counter 23. second decoder 24.

The work of the proposed binary system will be considered first for the dynamic part of the system (blocks 1,3.- 15), and then the logical part (blocks 2, 16-24).

The dynamic part of the binary system functions as follows. The signal Yjs (t) from the block 2 of the setters is compared with the signal from the output of the control object 1 in the block 3 of the comparison. The output signal from unit 3 of the comparison X (t) Yjs (t) - Y (t) goes directly to the input of the first modular element 7i, and to the inputs of the remaining modular elements 72, 7h, ... 7n through differentiators 4i, 42 ,. .., 4п-1 of corresponding orders, the signal from the output of comparison unit 3 and the signal from the outputs of differentiators 4i, 42, ..., 4n-1 through the corresponding first amplifiers 5i. 52, .. ,, 5n are fed to the second adder 6. The linear combination of the error signal X (t) obtained at the output of the second adder, its (n-1) -th derivative and the signal from the output of the second multiplier 15 is an error of the coordinate-parametric contour o (t), it is fed to the input of the relay element 12, and the signal from the output of the relay element 12 to the input of the inertial filter 13, the output of which (f) is a continuous smooth signal,

which is caused by a change in the parameters of the object, the signal goes to the second input of the first multiplier 14 and to the first input of the second multiplier 15. Output signals of the modular elements 7i. 72, .... 7n is converted to the corresponding second 8i. 82, .... 8p and third 9i, 92, ..., 9n amplifiers, the outputs of which are added together at the first 10 and third 11 adders, respectively, from the output of the third adder 11, the signal arrives at the second input of the second multiplier 15, resulting in a linear the combination of the error coordinate X (t) and its derivatives is multiplied by the signal / f) and the result of the multiplication is fed to the input of the second adder 6, according to the scientific output of the first adder 10 the linear combination of the error and its derivatives is fed to the first input of the multiplier 14, the second input of which signal u (t) is given, as a result of multiplying by control signal U (t) is generated, which is fed to the input of control object 1.

The logical part of the binary system operates as follows. In the initial state, at the first output of the second decoder 24 there is a single potential, at the remaining outputs there are zero potentials, and at the output of the unit 2 adjusters there is a setting effect Yi (t). corresponding to the first stage of the control object 1. As already noted, the signal X (t) YjS (t) - Y (t) from the output of the comparison unit 3 is fed to the input of the comparison threshold element 16, where it is compared to zero. In case X (t) 0, a single signal appears at the output of the threshold comparison element 16, which is fed to the blocking input of the comparison element 16 and to the trigger input of the pulse generator 17. At this, the comparison element 16 stops its operation, and from the output Oscillator 17 pulses begin to flow to the input of the first counter 18. The code from the output of which enters the input of the first decoder 19. In the event that a certain number of gm pulses corresponding to the duration of the first stage arrive from the generator 17 at the first output of the decoder 19, a signal appears that goes to the first input of the first element of the AND block 20, the second input of which contains 1 from the first output of the second decoder 24. At the same time, from the first output of the 20 element AND block, a single signal goes through the OR 21 element to the zeroing input counter 18, to the input of the blocking generator 17, to the input of the second counter 23, and to the input of the delay element 22. The generator 17 stops its operation, the counter 18 is zeroed, the counter 23

triggered on the leading edge and its content is increased by one. The code from the output of the counter 23 is fed to the input of the decoder 24, at the second output of which a single potential appears, which is not supplied by the second input of the second element of the And block 20 and to the second input of the setpoint adjuster 2. In accordance with the input signal, the unit 2 of the sensors changes the driving force from Yt (t) to Y2 (t), which is fed to the input of the unit 3 of the comparison. Here, the single potential through the delay element 22 is fed to the unlock input of the comparison element 16, which resumes its operation from this moment on. Thus, the transition to the second stage of the control object 1 is carried out. In the future, the system works in a similar way.

The technical and economic effect of the proposed binary system with KOS, KPOS, POS and KSOS consists in the ability to control objects with a time-varying piecewise-constant task with an unknown duration of piecewise-constant intervals, this ensures the adaptation of the binary system to the action of uncontrolled coordinate and parametric perturbation and reduces the duration of each stage of the technological process, therefore, the duration of the entire technological process as a whole. In addition, the formation of a target effect depending on the stage of the technological process allows improving the quality of the target product.

Claims (1)

A binary control system comprising a series-connected first adder, a first multiplier, a control object and a comparison unit, the output of which is connected to the inputs of the group differentiators, the outputs of which and the output of the comparison unit are connected through the corresponding amplifiers of the first group to the inputs of the second adder and through the corresponding modular elements groups to the inputs of the corresponding amplifiers of the second and third groups, the outputs of which are connected to the inputs of the first and third adders, respectively the output of the second adder is connected to the input of a relay element connected by outputs to the input of an inertial filter, the output of which is connected to the second input of the first multiplier and the first input of the second multiplier, the second input of which is connected to the output of the third adder, and the output is connected to the corresponding input of the second adder, characterized in that, in order to expand the functionality of the system by controlling objects with a time-varying piecewise-constant task with an unknown duration piecewise-constant intervals, it additionally contains delay element, serially connected threshold comparison element, pulse generator, first counter, decoder, AND block, OR element, second counter, second decoder, and a loop setpoint block connected by an output to a summing input of a comparison unit, the output of which is connected to the signal input of a threshold comparison element connected by an output to its the lock input, the output of the OR element is connected to the lock input of the pulse generator, the zero input of the first counter, and through the delay element to the unlock input of the threshold comparison element, the output group of the second decoder is connected to another input of the I. Phage ( ikw