SU1691765A1 - Device for determining frequency of harmonic signal - Google Patents

Abstract

The invention relates to a measurement technique and is intended to measure the frequency of a harmonic signal in a time shorter than the period of the measured signal. The purpose of the invention is to improve the accuracy of determining the frequency of a harmonic signal. It is achieved by introducing into the device a block for selecting the maximum value, a large scale amplifier 17, a block 18 comparing two numbers, block 7 forbidding, blocks 13,14,15 for determining the absolute value and the formation of new functional relationships. . The device also contains analog-to-digital converter 1, memory registers 2,3,4, adder 5, converter 6, digital-to-analog converter 8, functional converter 9, pulse generator 10, and blocks 11 12 delay 1 sludge.

Description

This invention relates to a measurement technique and is intended to measure the frequency of a harmonic signal in a time less than the period of the measured signal.

The aim of the invention is to improve the accuracy of determining the frequency of a harmonic signal.

The drawing shows the functional diagram of the device for determining the frequency of the harmonic signal

The device contains serially connected analog-to-digital converter 1, memory registers 2 3 and 4, as well as adder 5, divider 6, prohibition block 7, digital-to-analog converter 8 functional converter 9 and series-connected pulse generator 10 and first and second blocks 11 and 12 delays, absolute magnitude determination units 13, 14, 15, maximum value selection unit 16, scale amplifier

17 and a block 18 for comparing two numbers, the output of which is connected to the second input of the prohibition block 7, the output of the pulse generator 10 is connected to the control inputs of the analog-digital converter 1 and the network register 4, the outputs of the first and second delay blocks 11 and 12 are connected respectively to the control inputs of registers 3 v 2, the outputs of the first and third blocks 13 and 15 for determining absolute values are connected to the inputs of block 16 for selecting the maximum value, and the output of the second block 14 for determining absolute values are connected to the second input of block ka

18 comparing two numbers, the first input of which is connected via a scale snubber 17c by the output of the maximum value selection unit 16, while the output of the first memory register 2 is connected to the input of the first absolute value determination unit 13

Vj o ate

and the first input of the adder 5, the output of which is connected through the serially connected divider 6, prohibition block 7, digital-to-analog converter 8 and functional converter 9 is connected to the output of the device, the output of the second memory register 3 is connected to the second input of the divider 6 and the input of the second absolute determination unit 14 values, and the output of the third register 4 of the memory - with the second input of the adder 5 and the input of the third unit 15 for determining the absolute value.

Blocks 13, 14, 15 of the absolute value determination can be made in the form of N-bit repeaters, in which there is no sign bit in the output signal, blocks 5, 6, 9, 17 can be performed on the ROM, block 18 - on a microcircuit of the type 530SPT, block 7 - on D-triggers, and block 16 - on 530КП1.

A device for determining the frequency of a harmonic signal operates as follows.

The analog input of the analog-digital converter 1 receives a monitored signal. Converter 1 converts the instantaneous amplitude values of the monitored signal into a digital code at the moments of arrival of pulses from generator 10. Generator 10 generates pulses with a repetition period equal to t. Registers 2,3 and 4 of memory form a three-bit shift register in which digital codes are written three instantaneous amplitudes of the monitored signal, following through the reference time intervals g. For the correct movement of information in the specified shift register, delay blocks 11 and 12 are used.

Adder 5 performs a totalization of the numbers written in registers 2 and 4, and divisor 6 divides this amount by the number written in register 3.

Blocks 13 and 15 determine the absolute values of the numbers written in registers 2 and 4, and block 16 selects the maximum value from these absolute values. Large-scale amplifier 17 forms in its

output number is rm UM, where d is relative: Att

The amplitude measurement error is with the help of the converter 1, Af - the absolute error of the harmonic signal frequency determination is required. The values of b, af and t are constant and given. Block 18 compares the number formed by amplifier 17 with the absolute value of the number written in

d

T Ggimshna

register 3. If LJ21

At the output of block 18, a potential is formed that closes the prohibition block 7, i.e. signal with

the output of the divider 6 does not pass to the input of the digital-analog converter 8, and at the output of block 7 the digital code received at the output of the divider 6 during the previous measurement process often ™ is stored. AT

In this case, the prohibition block 7 will open upon receipt from the generator 10 to the control input of the next pulse converter I, when the second, third digital codes are recorded in registers 4.3 and 2

5 and the fourth fixed instantaneous values of the amplitude of the monitored signal.

In the case of an open interdiction unit 7, the digital result code obtained at the output of the divider 6 is converted by means of a converter into an analog signal, which is processed by the functional converter 9 according to the law arccos /

5 (x / 2).

Thus, at the output of the functional converter 9, a signal is generated, the amplitude of which is equal to the frequency value of the input harmonic signal.

0 Blocks 5-9 and 13-18 are a calculator.

Claims (1)

Apparatus of the Invention A device for determining a harmonic signal frequency, comprising, respectively, 5 connected pulse generator, first and second delay units, serially connected analog-to-digital converter, first, second, third memory registers, summation, The first input of which is connected to the output of the first memory register, the second input to the output of the third memory register, and the output to the first input of the divider, the second input of which is connected to the output of the second memory register, and connected digital-to-analogue converter and functional converter, moreover, the output of the pulse generator is connected to the control inputs of the analog-digital 0 and the third memory register, and the outputs of the first and second blocks. the delays are connected to the control inputs of the second and first memory registers, respectively, characterized by 5 that, in order to improve the accuracy of determining the frequency, a maximal value B tftopa block, a scale amplifier, a block of comparison of two numbers, a block block and the first, second and third bounds of the absolute definition are entered into it. which are connected respectively to the outputs of the first, second and third memory registers, the inputs of the maximum value selection unit are connected to the outputs of the first and third absolute value determination units, the information input of the prohibition unit is connected to the output of the divider, and the output to the digital-analog input the converter, the output of the second absolute value determination unit is connected to the second input of a two-digit comparison unit, the first input of which is connected via a scale amplifier to the output of the maximum value selector unit, and the output to the second input of the inhibit unit. R