SU1679407A1 - Phase discriminator - Google Patents

Abstract

The invention can be used in the development of electrical measuring equipment based on measuring the phase difference of two periodic signals, one of which is considered as a reference. The aim of the invention is to improve the accuracy and resolution. The phase detector contains drivers 1, 2, clamps 3, 4 levels, filters 5, 6, clamp 7, adder 8. The clamp 7 included in the phase detector circuit is a communication element of the measuring channel with the reference one and is made on a logical element 2I-HE. Filters 5, 6 low frequencies are included at the inputs of the adder. 1 hp ff, 2 ill.

Description

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The invention relates to electrical measuring equipment and can be used in the design and manufacture of devices based on measuring the phase difference of two periodic signals, one of which is considered as a reference,

The purpose of the invention is to improve the accuracy and resolution.

FIG. Figure 1 shows the structural electrical circuit of the phase detector; Fig. 2 shows stress plots at various points in the circuit.

The phase detector includes the first 1 and second 2 drivers, the first 3 and second 4 level clamps, the first 5 and second 6 low pass filters, the third level clamp 7, the adder 8. The first outputs of the formers 1 and 2, respectively, through clamps 3 and 4, filters 5 and 6 are connected to the inputs of the adder 8. The second output of the imaging unit 1 through the clamp 7 is connected to the second input of the clamp 4, and the second output of the imager 2 nd by the second input of the clamp 3.

Phase detector works as follows.

The input circuits of the device (outside the phase detector) provide reception, amplification and formation of the input and reference signals, converting them into pulse sequences with an arbitrary (depending on the measured phase shift) delay of the pulses of one channel relative to another (plot Ui, Oz in Fig. 2) ). The measured signal is inverted twice by shaper 1 and latch 7 and has the same output as latch 7 as at the direct output of shaper 1 (plots Ui, U2J. Signals at the direct and inverse outputs of shaper 2 are shown on plots U4. Clamps 3 and 4, made on elements 2I-NOT, produce pulse sequences Us, Ue, the duration of which depends on the measured phase difference, including the latch 7 in the circuit connecting the output of the driver 1 to the input of the latch 4, and the presence of direct communication output shaper 2 with input fi This means that a change in the phase difference between the measured and reference signals (say, positive) leads to an increase in the duration of the positive period of the pulse sequence Us and a decrease in the duration of the positive period of the pulse sequence O, i.e., the constant components of the voltages Us and Ue, separated by low-pass filters 5 and 6, change inversely.

and inverse inputs of the adder, we have the output voltage U, quadratically dependent on the change in the phase difference of the input signals.

Output Drift Elimination

It is provided by using a precision operational amplifier as an adder, by stabilizing the power of all circuit elements.

The implementation of the proposed detector

allows to obtain the following technical characteristics: the limits of measurement of the phase difference of the measured and reference signals without switching the range of 0-90 °; the gradient of phase conversion to a voltage of 50 mV / deg; basic measurement error not more than 0.1%; total additional error is not more than 0.1%.

Claims (2)

1. Phase detector containing first and second drivers, whose inputs are device inputs, first and second level locks, adder, first low-pass filter, Output terminal, characterized in that, in order to improve the accuracy and resolution, a third one is introduced level and the second low-pass filter, with the outputs of the first and second drivers are connected in series with the first inputs of the first and second latch, the first and second low-frequency filters, the first and second inputs of the adder, the output of which is connected to the Output terminal; the second outputs of the first and second drivers are connected, respectively, through the third level latch with the second inputs of the second and the first latch level. 2. The detector in accordance with claim 1, of the fact that the level clamps are made on the logical elements 2I-NO. four 1/5 U6 ... D .--- P. Pg “Ј 7 Umx FIG. 2