SU1670616A2 - Device for measuring voltage mean-square value - Google Patents

Abstract

The invention relates to electrical measuring equipment and can be used in alternating voltage voltmeters to extend their functions and implement in their structure a voltage calibrator of complex waveform. The aim of the invention is to expand the field of application by ensuring that the device operates in a voltage calibrator mode. The measured signal is processed by a wideband amplifier 1 with a programmable gain controlled by an arithmetic unit 2 and a comparison unit 4. The comparison is made with the source signal of exemplary voltage 3 using an extremum code definition unit 5 and a multiplying digital-to-analog converter 6. The device has a system reduce comparison errors, containing reversible counters 7 and 17, trigger 8, timer 9, delay element 10, logic block 11, control block 12, switch 13, calculate atel 14, an amplifier 15, the multiplying digital to analog converter 16. In order to provide an output mode calibrator scale converter 18 and put the memory register 19. 1 il.

Description

The invention relates to electrical measuring equipment and can be used in alternating voltage voltmeters to expand their field of application by providing operation in a voltage calibrator mode of complex waveform.

The purpose of the invention is to expand the field of application by ensuring the device operates in a voltage calibrator mode.

The drawing shows a block diagram of the device.

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A device for measuring the rms voltage value contains a wideband amplifier 1 with a programmable gain factor, the first input of which supplies the measured voltage, and the second input is connected to the first output of the arithmetic unit 2, the second output of which takes the code of the measured voltage, reference voltage source 3 comparing unit 4 for comparing rms voltage values, signal extremum code determining unit 5 and multiplying digital-to-analog converter b, n rvye inputs of which are connected to the output of broadband amplifier 1 with a programmable gain amplifier, a second input of multiplying digital to analog converter connected to the outlet 6 down counter 7 and the first

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the input of the arithmetic unit 2, the second input of which is connected to the output of the block 5 of determining the extremum code of the signal, the second input of which is connected to the first input of the trigger 8, the first input of which is connected to the input of the timer 9, the input of the delay element 10 and the input Starting, the second input of the trigger 8 is connected with the output of timer 9, and the second output of the trigger 8 is connected to the third input of the arithmetic unit 2 and the first input of the logic unit 11, the second input of which is connected to the output of the comparison unit 4, the first output of the logic unit 11 is connected to the first m input of the reversible counter 7, and the second input with the fourth input of the arithmetic unit 2, the output of the delay element 10 is connected to the second input of the reversible counter 7, with the third input of the signal extremum code determining unit 5, the fifth input of the arithmetic unit 2 and the third input of the logic unit 11, the first input of the control unit 12, connected to the control input of the switch 13, is connected to the first output of the trigger 8, and the second input of the control unit 12 to the output of the comparison unit 4, the first input of which is connected to the output of the subtractor 14, and the second input is with the output of the switch 13, the first input of which is connected to the output of the source 3 of the reference voltage, the input of the amplifier 15 and the first input of the second multiplying digital-to-analog converter 16, and the second input of the switch 13 is connected to the output of the multiplying digital-analog converter 6, the output of the control unit 12 through the second reversible counter 17 is connected to the second input of the second multiplying digital-to-analogue converter 16, the output of which is connected to the first input of the subtractor 14, the second input of which is connected to the output home amplifier 15, the output of the multiplying digital-to-analog converter 6 is connected to the information input of the output scale converter 18. The control input of which is connected to the output of memory register 19, the output of the output scale converter 18 is connected to the output terminal of the device, the memory reset input of memory 19 is connected with the output of the delay element 10, and the recording input and the information input of the memory register 19 are connected to the external control terminals.

A device for measuring the rms voltage value is as follows.

The Start signal, which is fed to the inputs of timer 9, trigger 8, and delay element 10, activates these elements.

The delay element 10 generates a reset pulse of the entire device, the trigger 8 from the first output supplies the resolving potential to the signal extremum code determining unit 5, to the first input of the control unit 12, turning it on, and controlling the switch 13 to turn into the first position (see drawing), in which the drift of the comparison block is corrected. The trigger 8 is turned on for the time of the timer 9. The operation of the timer 9 is chosen so that the period of the lowest frequency of the measured voltage overlaps with time and during this time at least one correction cycle of the comparison unit 4 can be performed. Processes determining the extreme value of the signal The signal extremum code determination unit 5 and the correction process of the comparison unit 4 proceed simultaneously and independently from each other. The work includes block 5 of determining the extremum code of a signal, which determines and fixes the code of the module of the global extremum (the largest amplitude value of the measured signal without taking into account its sign). At the same time, the gain of the wideband amplifier 1 with programmable gain is set by the arithmetic unit 2 after resetting to one.

From the switch 13 to the second input of the comparison unit 4, the voltage of the source 3 of the reference voltage comes. The same voltage arrives at the input of the amplifier 15 and the first input of the multiplying digital-analog converter 16, which, under the influence of control signals from the additional reversible counter 17, divides the voltage Uo and outputs the signal CHU0 to the first input of the switcher 14, where Сн 1 is the proportionality coefficient . The second input of the subtractor 14 receives the amplified signal CTU0, where St 1 is the gain of the amplifier 15. At the output of the subtractor 14, a voltage U0 CrUo - CnUo is formed, which may be greater or less than the magnitude of the root mean square value of the voltage Uo, in order to compensate for the drift voltage of the comparison unit 4. The drift is compensated for by the operation of the control unit 12 and the reversible counter 17. The control unit 12 to the second input receives signals from the comparison unit 4, which .upravl yuschee exert influence on code down counter 17. In case of equality Uo Uo1 - UAP wherein etal - drift voltage comparing unit 4, the trace of conductive

the correction system comes to equilibrium and fluctuates with the voltage of the discrete block of 16q, multiplied by the coefficient of proportionality C. Such an equilibrium occurs after several cycles of correction, and the code of the additional reversible counter 17 is not reset from the measurement to the measurement, but only refined.

After the timer 9 triggers, the trigger 8 switches, which turns off the extremum determination unit 5 and the drift correction system of the comparison unit 4 and switches on the third input to the arithmetic unit 2 and logical block 11 on the first input. For the subsequent measurement of Ux, the value U0 Uo 4 is used as the sample voltage source. As a result of the subsequent measurement, instead of the reference voltage Do from the source 13, the measured voltage c multiplying the digital-to-digital converter 6, the value of io oporo as precisely as possible should be equal to i UF.

The arithmetic unit 2 on the second run accepts the extremum code of the measured voltage, fixes it on command from trigger 8 and performs rationing on the amplitude of the output signal of wide-band amplifier 1 with programmable gain according to the formula

Kn

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U

hmakg

where Kn is the amplification factor of the wideband amplifier 1, so that the amplitude of its output voltage is equal to a given value;

DH is the specified amplitude value of the output signal of the wideband amplifier 1 with a programmable gain factor when normalizing the signal with respect to the amplitude;

ixmax is the extreme value of the output signal, fixed by the block 5 for determining the signal extremum code.

The normalization code corresponding to the magnitude of the gain of the wideband amplifier 1 with a programmable gain factor Kn is fed from the first output of the arithmetic unit 2 to the second input of the wideband amplifier 1 with a programmable gain factor. At the output of the wideband amplifier 1 with a programmable gain factor, the rms value of the voltage Ux1 KUx with an amplitude close to the specified value UH is set. From the output of the wideband amplifier 1 with a programmable gain, the voltage Ux1, normalized in amplitude, is applied to the multiplying digital-to-analog converter 6. which is controlled by the reversible counter 7 and the comparison unit 4 through the logic unit 11. The voltage Ux is divided by multiplying the digital-to-analog converter 6 so that at its output a rms value of voltage was established, equal in magnitude to the rms value of U0 - U04 + ID, which, as a model, was set at the first ode comparing unit 4 output from subtractor 14. The output of down counter 7 is set to the code corresponding to the dividing ratio

N

 | DAC is smart

 IT

Uo

where N DAC smart - the maximum code value multiplying the digital-to-analog converter 6;

Do is the rms value of the reference voltage of source 3.

Thus, the error from the drift of the matching unit 4 is eliminated. The indicated operations of finding the code of the reversible counter 7 are carried out with the clock frequency of the logic unit 11, which, depending on the output signal of the comparison unit 4, generates on the summing or subtracting inputs of the reversing counter 7 its Npc code until the stresses at the inputs of the comparison unit 4 become equal.

After passing the cycle of operation of the logic unit 11 by balancing the voltages at the inputs of the comparison unit 4 and receiving the code of the reversible counter 7, the second output logic unit 11c generates a signal to the fourth input of the arithmetic unit 2, according to which the Npc code is written into the arithmetic unit 2.

Next, the arithmetic unit 2 calculates the code of the value of the mean square value of the measured voltage by the formula

N

DAC is smart

Uo

Kn Npc

and sets this code value to the second output, which is the output of the device.

At the output of the multiplying digital-analog converter 6, at any value (within the measurement range) of the measured voltage, a voltage of the measured signal is set equal to the rms value of the source 3 of the reference voltage. This makes it possible to use this signal voltage as an exemplary one and feed it to the input of the output scale converter 18.

The output code from the second output of the arithmetic unit 2 is accompanied by a strobe pulse, which is fed to the external control unit. This pulse can be used to generate a control signal for recording the output voltage code and memory register 19, if the device needs to be used as a voltage calibrator. The code from memory register 19 is fed to the output scaler 18 and controls the output voltage of the device, which is fed to its analog output.

A single measured value of the input signal may correspond to a set of codes recorded in memory register 19. Each code corresponds to its calibrated voltage value,

frequency and form coinciding with the measured signal at the device input.

The new measurement cycle is performed by applying the next Start signal.

Thus, the device can be used as a calibrator for certifying voltmeters that measure voltages of complex shapes, which expands its scope.

Claims (1)

Invention Formula A device for measuring the rms voltage value according to the auth.st. No. 1582140, characterized in that, in order to expand the field of application by ensuring the device operates in a voltage calibrator mode, a memory register and an output scale converter, an additional output terminal and external control terminals are entered into it, the information input of the output scale converter is connected with the output of the first multiplying digital-to-analog converter, the control input of the output scale converter is connected to the output of the memory register, and the output of the output scale converter L connected to the additional output terminal, the register reset input is connected to the memory output of the delay element, the input recording data input register and the memory are connected to external control terminals.