SU1649568A1 - Electronic dictionary for studying foreign language - Google Patents

Abstract

The invention relates to automation and computing, in particular to devices for training, and can be used to automate the process of learning a foreign language. The aim of the invention is to increase the information capacity of the dictionary. The electronic dictionary for learning foreign languages contains an input register 1, a control unit 4, the first 6 and second 28 codes of equality of codes, a 10-level counter and a search

Description

The invention relates to automation and computing, in particular to devices for training, and can be used to automate the process of learning a foreign language.

The purpose of the invention is to increase the information capacity of the dictionary,

FIG. 1 is a block diagram of an electronic dictionary for learning.

2 is the structure of one of the variants of information stored in the memory; Fig. 3 and 4 are a block diagram of one of the variants of the control unit operation algorithm.

The device has an input register 1 information input 2 of the device, the first output 3 of the control unit 4, the second output 5, the first code equality circuit 6, the first input 7, the third 8 and the fourth 9 outputs of the control unit 4, the level counter 10, the second 11 and the third 12 memories, the fifth 13 and the test 14 outputs of the control unit 4, the adder 15, the first output register 16, the seventh 17 and the eighth 18 outputs of the control unit 4, the second 19 and the third 20 output registers, search counter 21, the ninth 22 , the tenth 23 and eleventh 24 outputs of the control unit 4, the fourth memory The device 25, the information output 26 of the device, the twelfth output 27 of the control unit 4, the second code equality circuit 28, the second input 29, the thirteenth 30, the fourteenth 31, the fifteenth 32 and the sixteenth 33 outputs of the control unit 4, the first memory 34, the output bus 35, the decoder 36, the third input 37, the seventeenth output 38, the fourth 39, the fifth 40 and the sixth 41 inputs of the control unit 4, the eighteenth 42, the nineteenth 43 and the twentieth

44 outputs of block 4 control and output

45 clock pulse generator.

The device includes four storage devices. I remember

P

five

Q

five

five

The device 34 contains information about words that are included in the device lexical reserve.

Figure 2 shows the structure of information in the storage device 34 for a lexical margin of ten words and reflects the conditional division of cells into so-called levels. Thus, the cells from the 1st to the 3rd form the level of the first letters or the first level.

The cells corresponding to the second letters of words (from the 4th to the 10th) form the second level, etc.

Solid lines indicate subordination.

For each letter there are different branching values that are equal to the numbers of subordinates of this book. , Next to each letter, the value of its branching is recorded. Physically, in the storage device 34, one cell is retracted for one node. In this case, the code of the corresponding letter is stored in the bits of the cell with the numbers 1,2, ..., K, and the branching is stored in the bits K + 1, K + 2, ..., 1.

A memory area occupied by subordinates for each letter is called a zone, with the first subordinate letter the lower boundary of the zone, and the last subordinate letter the upper boundary of the zone. The length of the zone is equal to the branch value of the node to which the given zone is subordinate. Each word included in the lexical reserve of the device has corresponding output information which is stored in the storage device 25. At the same time

information to one word is stored in one or several cells of the storage device 25. The number of cells containing information for each word is recorded at the branch location with the symbol (the symbol indicates the end of a word).

The storage device 12 contains information about the levels, and each level of the storage device 34 corresponds to one cell of the chapomilating device 12 with an address equal to the level number. All bits of each cell of the storage device 12 contain a code of the number of nodes at the corresponding level (the number of nodes of each level, except the first, is equal to the sum of the branching of the nodes of the previous level).

The memory device 1 1 contains information about the number of cells in the memory device 25 allocated for words of the appropriate length. For example, in the 4th cell of the storage device 11, the address (in the storage device 25) of the last cell containing the output information relating to the last of the words consisting of 3 letters is recorded. In the 5th cell of the storage device, 1 1 stores the address where the last part of the output information is stored in the memory 25 to the last of the words consisting of 4 letters.

Fig. 2 in the right-hand side shows a table with an example of filling in the storage devices 12 and 11. Register 1 is used to store the letters of the word searched in the electronic dictionary. The decoder 36 responds to reading from the memory 34 cells with a symbol. Registers 19 and 20 are used to accumulate the addresses of the lower and upper boundaries of the zone.

The operation of the device is explained using the flowchart shown in Fig. 3 and 4 of one of the possible algorithms for the operation of the control unit 4.

Each block of this algorithm corresponds to one clock period, C (i) denotes a signal at the i-th input (output). Signals that are not driven in the blocks of the algorithm are considered equal to zero.

Before starting to learn a new word, a logical unit (block 2 in FIG. 3) is supplied to the fourth input 39 of control unit 4, with which the device is prepared for operation. Thereafter, logical units appear at the outputs 22, 5, 17, and 9 of the control unit 4, which, arriving at the reset inputs of the search counter 21, the input register 1, the first output register 16 and the level counter 10, nullify their contents (see 3 in FIG. 3). After that, at output 44 block

4 controls is taken over by the unit of the unit, as a result of which the trainee is given a signal that it is possible to enter the next letter

Consider the operation of the device on the example of the search for a dictionary entry to the word POT. The student enters the first letter - P. At the same time, a synchronous unit (see block 5 in FIG. 3) is supplied at the synchronization input 40 of the control unit 4, resulting in the signal from the output 3 of the control unit 4, the letter U code is written in

5 register 1, the contents of the 10 level counter become equal to one (C (8) 1 in block 6). Next, the signal from the output 14 of the control unit 4 at the output of the storage device 12

0, the contents of the initiated cell, i.e. the number of nodes of the first level, which is recorded from the signals from the outputs 18 and 30 of the control unit 4 in registers 16 and 19 (see

5 block 7 in FIG. 3). Thereafter, the signal from the output 23 of the control unit 4 increases the content of the search counter 21 by one (it becomes equal to one). The signal from the output 38 of the control unit 4 on the output pin 35 of the memory device 34 shows the contents of the first cell. When reading the first cell of the storage device 34, the write code,. sleigh in her letters with bits 35 350, ..., 35., his output mines 35

Jl-gh

arrives at the second input of the first circuit 6 of equality of codes, to the first input of which from the output of register 1 is filed

Q code of the first letter P of the word under study. In bits 35 u, 35 k + g, ..., 35 g of output bus 35, the number of branches of this letter appears.

If the signals at the inputs of the first equality system of the 6 codes are not equal, then the signal from the output 31 of the control unit 4 from the register output 19 to the second input of the second code equality circuit 28 receives the number of nodes of the first

A level that is compared with the current address. Here, only on the first level, the number of nodes equals the address of the cell for the last letter of a given -; level in the storage device-34 (figure 2). If the signals at the inputs of the second circuit 28 are equal codes, then the output 42 of the control unit 4 is a logical unit, as a result of which the student is given

five

a signal that the word entered by him is not included in the lexical composition of the device.

For this example, the signals at the inputs of the second code equality circuit 28 are not yet equal, then the signal from the output 38 of the control unit 4 to the first input of the adder 15 receives the number of branches of the first cell letter, which is summed with the number of nodes of the first level that is output from register 16 to the second input of the adder 15. As a result, a code appears at the output of the adder 15 to form the boundaries of the slave zone for the second letter O, which is written to the register 16 by the signal from the output 18 of the control unit 4 (block 17 in FIG. 3). After that, the signal from the output 23 of the control unit 4 increases the contents of the search counter 21 (it becomes equal to two), allowing reading from the output bus 35 of the storage device 34. Thus, the device works until the first letter P. is found.

If the letter read from the storage device 34 coincides with the letter logged into the register, then the signal from the output 30 of the control unit 4 registers the contents of the register 16 in the register 19, which is the lower boundary of the second beech

You are O (block 10 in FIG. 3). In addition, the signal from the output 39 of the control unit 4 to the first input of the adder 15 from bits 35, 35Kti, ..., 351 tires 35 receives the number of branches of the first letter P (which is added to the lower boundary of the zone for the second letter O filed from the output of register 16. Then, at the output of the adder 15, the code of the upper boundary of the zone for the second letter O appears, which is written to the register 20 by the signal from output 32 (block 12 in Fig. 3), because the read letter turned out to be , then at the output 44 of the control unit 4 a logical unit appears, as a result of which the learner a signal is issued that it is possible to enter the next letter. Then the learner enters the second letter - O. Simultaneously with the submission of the second letter O code, a logical unit appears at the synchronization input 40 of control unit 4 (block 18 in FIG. 3), as a result what's the signal with you

five

0

five

about

0

five

3 of control block 4, the code of the letter O is written to register 1 (block 20 in FIG. 3). After that, the signal from the output 17 of the control unit 4 nulls the contents of the register 16. At the same time, the signals from the outputs 14, 18 and 24 of the control unit 4 from the output of the storage device 12 through the adder 15 and the register 16 to the information input of the search counter 21 nodes of the first level to find the first address of the second level (block 22 in FIG. 3).

The signal from output 8 of control block 4 increases the content of level counter 10 by one (it becomes equal to two). According to the signals from the outputs 14 and 18 of the control unit 4 from the storage device 12, the number of nodes of the second level is entered in the register 16 (block 23 in FIG. 3). After that, the signal from the output 23 of the control unit 4 increases the content of the search counter 21 by one (it becomes equal to four in the structure shown in Fig. 2). In this case, the signal from the output 38 of the control unit 4 to the input of the decoder 36 receives bits 35 4, 35, ..., 35 of the bus 35 (block 25 in FIG. 3). At the output of the decoder 36, a logical unit appears only when the symbol code Ј is supplied to its input,

If the logical unit does not appear at the output of the decoder 36, then the signal from the output 38 of the control unit 4 to the first input of the adder 15 receives the number of branches of the current letter from bits 35 4, 35.2, ..., 35g of gaina 35.

It is summed with the code that is fed from the output of the register 16 to the second input of the adder 15, resulting in a signal from the output 18 of the 4-control unit from the adder 15 to the register 16 i is written a new code to form the boundaries of the zone for the third letter T (block 27 in FIG. 3). After this, the signal from the output 31 of the control unit 4 from the output of the register 19 to the second input of the second code equality circuit 28 enters the lower boundary of the letter O, which is compared with the current address. If a logical unit appears at the output of the decoder 36, then the signal from the output 31 of the control unit 4 without increasing the code to form the zone boundaries for

the third letter T from the output of register 19 to the second input of the second code equality circuit 28 enters the lower boundary of the zone for the letter O, which is compared with the current address, since the% symbol does not have subordinates at the next level. If the signals at the inputs of the second equality circuit 28 are not equal, then the signal from the output 23 of the control unit 4 increases the content of the search counter 21 by one. It is compared with the lower boundary of the zone for the letter O. Thus, the device operates until the lower boundary of the zone is reached. If the lower limit of the zone for the letter O is reached, then the signal from the output 23 of the control unit 4 increases the content of the search counter 21 by one. After that, the signal from the output 38 of the control unit 4 from bits 35, |, 35,

letters). 35, ,, 35 2, .... 35, tires 35, which is summed up with the code that is fed from the output of the register 16 to the second input of the adder 15. as a result of this, the signal from the output 18 of the control unit 4 (from the adder 15, a new code is written to register 16 to form the zone boundaries for, letter T 0 (block 38 in FIG. 3). Then, the search counter 21, i.e. the current address of memory 34, is increased by a signal from the output 23 of the control unit. unit. If the logical unit appears at the output of the decoder 36, then the signal from the output 23 of the control unit 4 lichenie code for Form Rovani zone boundaries for the letter T is increased immediately the current address of that remember device 34 in units thus the device operates as long as not found our bu

15

20

Wah Oh. If the input signals are first

35k of the output bus 35 of the storage device 34, the code written in this 25 scheme 6, the equality of the codes are equal, i.e.

found our letter O

the letter cell arrives at the second input of the first circuit of the 6 equality of codes, the first input of which is the code of the letter O.

If the signals at the inputs of the first scheme 6 of the equality of the codes are equal, then the signal from the output 33 of the unit 4 controls the output of the register 20 to the second input of the second scheme 28 of the equality of the codes receives the upper limit code zoshd r for the letter O, which is compared with the current address of the second level, which is fed to the first input of the second code equality circuit 28.

Moreover, if the signals at the inputs 40 of the second circuit 28 are equal codes, i.e. the upper boundary of the zone for the letter O is reached, then the output 42 of the control unit 4 is a logical unit} as a result of which 45 the student is given a signal that the word is not included in the lexical composition of the device. Otherwise, i.e. if not achieved

the upper boundary of the zone for the letter O, then the signal from the output 38 of the control unit 4 to the input of the decoder 36 receives bits 35 (, 35,.,., 35 j. tires 35 (block 36 in FIG. 3).

If the input of the decoder 36 does not appear logical units, then the signal from the output 38 of the control unit 4 to the first input of the adder 15 receives the number of branches of the current

50

55

then after the accumulation of the lower and upper bounds. for the last letter T, the student can enter the third letter T. After this, the viewing process for the letter T is repeated as for the second letter O.

, Moreover, if our letter T is found after n, then registers 19 and 2 are entered into the lower and upper boundaries of the zone for the # symbol. After the learner has finished entering the letters of the word being studied, he sends a signal. As a result, a logical unit is fed to the input 41 of the control unit. After that, the signals from the outputs 22 and 17 of the control unit 4 will reset the search counter 21 and registration 16 (see block 40 in FIG. 4). At the same time, signals from the output 14, 18 and 24 of the control unit 4 from the storage device 12 to the search counter 2 through the adder 15 and the register 16 receive the number of nodes of the third level to find the first address of the fourth level (block 41 in Fig. 4) .

After that, the signal from the output 17 of control unit 4 reset the state of register 16 (block 42 in Fig. 4). - Then, the signals from the outputs 13 and 18 of the control unit 4 from the storage device II write to the zero register 16 the number of lines of output information for the third level (the block

64956810

letters). with a bit of 35., 35 2, ...., 35, bus 35, which is summed with a code that is fed from the output of register 16 to the second input of the adder 15. As a result, the signal from the output 18 of control unit 4 (from adder 15, a new code is written to register 16 to form the zone boundaries for, letter T 0 (block 38 in FIG. 3). Then, the content of search counter 21, i.e. the current memory address, is increased by the signal from the output 23 of control unit 4. 34, per unit. If a logical one appears at the output of the decoder 36, then the signal from the output 23 of the control unit 4 without increasing the code to form the boundaries of the zone for the letter T, the current address of the storage device 34 is immediately incremented by one. Thus, the device works until our letter 15 is found.

20

Wah Oh. If the signals at the inputs of the first

 schemes 6 of equality of codes are equal, i.e.

found our letter O

0 g

0 5

0

five

after accumulating the lower and upper boundaries of the zone for the last letter T, the student can enter the third letter T. After this, the viewing process for the letter T is repeated as for the second letter O.

In this case, if our last letter T is found, then the registers 19 and 20 are entered into the lower and upper boundaries of the zone for the # symbol. After the learner has finished entering the letters of the word being studied, he signals the Output, with the result that a logical unit is fed to the input 41 of the control unit 4. After that, the signals from the outputs 22 and 17 of the control unit 4 nullify the search counter 21 and the register 16 (see block 40 in FIG. 4). At the same time, the signals from the output 14, 18 and 24 of the control unit 4 from the memory 12 to the search counter 21 through the adder 15 and the register 16 to the post, drop the number of third level nodes to find the first address of the fourth level (block 41 in FIG. four).

After that, the signal from the output 17 of the control unit 4 resets the state of the register 16 (block 42 in FIG. 4). - Then, the signals from the outputs 13 and 18 of the control unit 4 from the memory II to the zero register 16 record the number of lines of output information for the third level (the block

43 in FIG. 4). Then, the signal from the output 23 of the control unit 4 increases the content of the search counter 21 by one (block 44 in FIG. 4). In this case, the signal from the output 38 of the control unit 4 to the input of the decoder 36 receives bits 354, ... s 35 tires 35.

If the logical unit appears at the output of the decoder 36, then the signal from the output 38 of the control unit 4 to the first input of the adder 15 receives the number of lines of the current U- character from 35 bits (/ + |, 35% +, ".., 35p tires 35t which is summed up with the number of the line which is supplied from the output 18 of the control unit 4, and the yrn of the string 15, the new number of lines (block 47 in FIG. 4) is entered into the register 16. control from the output of the register 19 to the second input of the second / equality circuit 28, the lower gralitz code of the zone for the character $ 5 is compared with the current address, which is fed from the output of search counter 21 to the first input of the second code equality circuit 28. If no logical unit appears at the output of decoder 36, then by the output from control 31 of the control unit without increasing the number of lines immediately from the output the register 19 to the second input of the second code equality circuit 28 receives the code of the lower boundary of the zone for the symbol, which is compared with the current address, which is fed from the output of the search counter 21 to the first input of the second code equality circuit 28.

If the signals at the inputs of the second equality circuit 28 are not equal, then the signal from the output 23 of the control unit 4 increases the content of the search counter 21,. the current address of the storage device 34, one.

Thus, the device operates until the lower boundary is reached for the% symbol. If the lower limit of the zone for the ff symbol is reached, then the signal from the output 23 of the control unit 4 increases the content of the search counter 21, i.e. the current address of the storage device 34, one.

After that, the signal from the output 38 of the control unit 4 to the decryption input

0

five

0

five

0

45

50

55

The rator 36 receives bits 35, 35., ..., 35 tires 35.

If a logical unit does not appear at the output of the decoder 36, then the signal from the output 33 of the control unit 4 from the output of the register 20 to the second weod of the second code equality circuit 28 receives the upper zone code for the symbol Ј, which is compared with the current address that is supplied from the output of the search counter 21 to the first input of the second code equality circuit 28.

If the signals at the inputs of the second equality circuit 28 are not equal, then the signal from the output-23 of the control unit 4 increases the contents of the search-1 counter 21, i.e. the current address of the storage device 34, one. Thus, the device operates until the pspra reaches the upper boundary of the zone for the # character. If the upper boundary of the zone is reached for the symbol, a logical unit appears at the output 42 of control unit 4, as a result of which the trainee is given a signal that the input the word is not included in the lexical composition of the device. If the logical unit appears at the output of the decoder 36, then the signal from the output 24 of the control unit 4 from the register 16 records the search address 21 in the search counter 21, which in the memory 25 precedes the first of the cells containing the output information to the entered learning word. After that, the signals from the outputs 38, 18 and 32 of the control unit 4 in the register 20 enter the address of the last cell containing the output information to the entered students word (i.e. the number of lines to our character + the number of lines for our word the number of the last cell for output to our word).

Then, the signal from the output 23 of the control unit 4 increases the content of the search counter 21 by one. Then, at the output of the search counter 21, the code of the first cell number is obtained for information to our word, which is fed to the address input of the memory 25 and to the first input of the second code equality circuit 28, to the second input of which the signal of the output 33 outputs the code of the last cells of our information (block 56 in FIG. A).

At the same time, if the signals at the inputs of the second equality circuit 28 are not equal, then the signal from the output 27 of the control unit A at the information output 26 of the device appears at the top and in the interface.

After that, the signal from the output 23 of the control unit A increases the contents of the search counter 2t, i.e. the current cell number of our information in the storage device 25. So

increasing the information capacity of the dictionary; the second, third and fourth memory devices, a level counter, a decoder, an adder, the second and third output registers are entered into it, the first K of the information output of the first memory device being connected to the second input of the first code equality circuit and the input the decoder, the output of which is connected to the input of the sign of the end of the drain of the control unit, the outputs from (KM) of the first to the 1st bits of the information

In this way, the device reads our information output of the first storage device until the signals at the inputs of the second code equality circuit 28 are equal. If the signals at the inputs of the second equality circuit 28 are equal, then the signal from the output 27 of the control unit A on the information output 26 shows the last part of our information. When reading at the output A3 of the control unit A, a logical unit appears, as a result of which the learner is given a signal that the reading of information is permitted. To learn a new word, the learner works with the device in the described sequence.

Claims (1)

Invention Formula An electronic dictionary for learning a foreign language containing an input register, first and second equality codes, a control unit, a search counter, a first memory device, a first output register, the information input of the dictionary being the information input of the input register, the output of which is connected to the first input of the first the equality circuit of the codes, the output of which is connected to the corresponding input of the control unit, the search counter output is connected to the address input of the first memory device, which distinguishes so that 20 thirty (1 is the memory size of the storage device) and the corresponding bits of the outputs of the second and third storage devices are connected to the first input of the adder, the output of which is connected to the information input of the first output register, the output of which is connected to the information inputs of the second and third output 25 registers, the search counter and to the second input of the adder, the output of the level counter is connected to the address inputs of the second and third storage devices, the output of the search counter is connected to the address input four to six the remembering device and the first input of the second code equality scheme whose second input is connected to the outputs of the second and third output registers, the output of the second code equality scheme is connected to the input of the absence of the input word in the lexical composition of the dictionary of the control unit, the output of the fourth memory device is the information output of the dictionary , the read inputs of the memory devices are connected to the corresponding inputs of the control unit, reset inputs, write enable, input register synchronization inputs, p The first, second and third output registers, the search counter and the level counter are connected to the corresponding outputs of the control unit. 35 40 45 j output of the first storage device0 0 (1 is the memory size of the storage device) and the corresponding bits of the outputs of the second and third storage devices are connected to the first input of the adder, the output of which is connected to the information input of the first output register, the output of which is connected to the information inputs of the second and third output 5 registers the search counter and to the second input of the adder, the output of the level counter is connected to the address inputs of the second and third storage devices, the output of the search counter is connected to the address input of the fourth memory and with the first input of the second code equality circuit, the second input of which is connected to the outputs of the second and third output registers, the output of the second code equality circuit is connected to the input of the absence of the input word in the lexical composition of the dictionary of the control unit, the output of the fourth memory is information output dictionary, memory read inputs, connected to the corresponding inputs of the control unit, reset inputs, write enable, input register synchronization inputs First, second and third output registers, search counter and - level meter connected to the corresponding outputs of the control unit. five 0 five with  one 3 " sh fe