SU1635277A1 - Receiver of analog-to-digital data signals - Google Patents

Abstract

The invention relates to telecommunication technology. The purpose of retransmission is to increase noise immunity. The analog-digital receiver contains a linear filter 1, a matching unit 2, a demodulator 3, an analog-digital converter 4, an adaptive equalizer 5, a decisive block 6, a decoder 7, a descrambler 8, a coefficient control block 9, a sampling frequency compressor 10, Spock 11 f (Phase criteria criterion, controlled generator 12 The received signal through the matching unit 2 is fed to the demodulator 3. The demodulated digitized signal is fed to the adaptive equalizer 5. The reference unit is formed by the decision unit 6 signals. A phase adjustment criterion is formed in block 11. Due to the elimination of the frequency shift in the signals at the input of the adaptive equalizer 5, noise immunity is increased.

Description

ABOUT

with

SP GS

1 J

The invention relates to telecommunications engineering and is intended to receive signals generated by multi-level modulation techniques.

The purpose of the invention is to improve noise immunity.

The drawing shows the structures on the electrical circuit of the proposed receiver.

The analog-digital data signal receiver contains a linear filter 1, a matching unit 2, a demodulator 3, an analog-to-digital converter 4, an adaptive equalizer 5, a decisive block 6, a decoder 7, a descrambler 8, a coefficient control block 9, a sampling frequency compressor 10 , phase criterion generation unit 11, controlled generator 12.

The received signal from the output through the matching unit 2 is fed to the demodulator 3. In the matching unit 2, the necessary transfer of the received signal by frequency is carried out, as well as the automatic level adjustment. A demodulated signal digitized by analog-digital converter 4 is fed to an adaptive equalizer 5. It compensates for intersymbol interference (MSI) in the received signal, due to the non-ideal frequency characteristics of the transmission path and filter equipment of the transmitter and receiver (not

0

50

five

shown). By means of a decision block 6, reference signals R (kT) are generated from the signals R (kT), Q (kT.)

Q (kT).

In step 9 v in accordance with the selected algorithm of operation of the adaptive corrector 5, a signal is generated that corresponds to the control of the change in the tap coefficients of the adaptive corrector 5.

In the compressor 10, the decimation (propagation) of the frequency of formation of the criterion for adjusting the phase of the carrier wave is performed.

In block 11, the phase adjustment criterion is formed, and with a linear filter 1 filter, a kp with AA and frequency adjustment of the carrier, i.e. signal generation, directly controlling the frequency and phase of the cobanin, supplied from the output of the controlled generator 12 to the second input of the demodulator 3.

Naturally, the analog-digital receiver includes a clock co-lance control unit (HP shown), the signal from the emitter controls the operation of the analog-digital converter A, the decoder 7, and the descrambler 8.

By means of block 9, the control signals for changing the coefficients of the adaptive corrector 5 are formed. Suppose that the adaptive corrector 5 has a cross structure and its coefficients C (n) and D (n) change in accordance with algorithm g

CC Os + Fri CjkT) -pfr (kT) Dm (k + 1) T Dm (kT) - (kT) l

D () is the coefficients of the adaptive corrector 5 along direct and cross-links;

T) - common mode sampling

and quadrature sig- nal, 50 cash in the taps of the adaptive equalizer 5.

ft is the adaptation constant;

“R (kT) - R (kT),

- Q (kT) - Q (kT)

(k-tn) T + q (kT) la (k-m) T (k-m) l - r (kT) lQ (k-m),

The sampling frequency compressor 10 carries out the decimation of the incoming signals, thereby lowering the required speed. The value of m is numerically determined by the delay from the signal in the circuit. Demodulator 3 is the input of decision block 6, i.e. Ј Ј, ml. It is practically convenient to take m equal to the delay introduced by the adaptive equalizer 5.

The custom filter 12 smooths the sequence of signals representing the phase adjustment criterion F and can be performed.

in the form of a digital filter of the first or second order.

As a reference oscillation of the demodulator 3f Cj (t) J, can be used:

a) harmonic signal

de

(t) b) meander

signCt

cosqKt)

sinCf (t)

)

sign cosCf (t) sign sinC (t)

at x 0 at x 0 at x O

Depending on the shape of the reference oscillation, the controlled oscillator 12 is sinusoidal (if the reference oscillation has a type a or discrete (if the reference oscillation has the form b)) generator, implemented, for example, according to the scheme generator using add / subtract circuit.

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five

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Claims (1)

Invention Formula An analog-to-digital data signal receiver containing a series-connected matching unit whose input is a receiver input, a demodulator, to the control input of which the output of the controlled oscillator, analog-digital converter and adaptive equalizer are connected, to the control input of which the output of the block is connected coefficient control, the first input of which is connected to the first output of the adaptive equalizer, and the serially connected decider, decoder and descrambler, the output of which is output receiver, characterized in that, in order to improve noise immunity, a sampling frequency compressor and a serially connected phase criterion shaping unit and a linear filter, the output of which is connected to the input of the controlled oscillator, are inserted, the first output of the decision unit is connected to the first input of the frequency compressor sampling, the second input and output of which is connected respectively to the second input of the coefficient control block, to which the second output of the decision block is connected, and to the inputs of the block ovani criteria phase.