SU1633472A1 - Digital adaptive multibeam antenna system - Google Patents

Description

one

(D) 4601073/09 (22) OJ.11.88 (46) 07.03.91. Bul Number 9

(71) Odessa Polytechnic Institute

(72) V.V. Radionov

(53) 621.396.677 (088.8)

(56) USSR Author's Certificate No. 1228172, cl. H 01 Q 23/00, 1986.

(54) DIGITAL ADLS AND NLA MULTIPLE ANTENNA SYSTEM

(57) The invention (with radar. The purpose of the invention is to simplify the hardware implementation and increase the noise immunity. Digital adaptive multi-beam antenna system contains an N-element phased antenna array 1, a digitizing circuit (DOS) 2 with analog-to-digital conversion

(ADC), 3 compensation blocks, 4 power inversion blocks. The compensation unit 3 contains two delay units, a weighting factor shaping unit (PVC), two complex weight adders (FAC). The power inversion unit 4 comprises a power measurement unit, a parameter calculation unit, a division unit, and two combined multipliers. The device maximizes the signal / (interference + noise) ratio, and the adaptive optimization algorithm is based on the modified orthogonalization process for the Gram-Schmidt correlation matrix of signals. The system of claims 2-5 f-ly is characterized by the execution of blocks 3 and 4, a block of PVC, and a block of power measurement. 4 h. n. f-ly, 5 ill.

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This invention relates to radar.

The purpose of the invention is to simplify the hardware implementation and increase the noise immunity.

Figure 1 shows the structural scheme of a digital adaptive MHOIO beam antenna system; figure 2 - block diagram of the compensation unit; FIG. 3 is a block diagram of a power inversion unit; FIG. Fig. 4 is a block diagram of a weighting factor of a weight coefficient; nl fig. 5 is a block diagram of a power measurement unit.

The digital adaptive multipatch antenna siggsp contains an M-element nougat phased array antenna (PAR) 1, a diagram of a wide variety of circuits (DSP) 2 with analog-to-digital converters (RC), blocks 3 of the bus components, Plokn 4 power inversion.

TS (Chg) x,

digital signal strength

. .., x Cr. Pass successively through the (N-1) groups of blocks of compensation i, the initial instructor X Ct; transformed. When is the countdown

About 1 / N

x - (t) arriving at the edge of the sig

The compensation unit 3 contains two delay units 5, a weighting factor formation unit (FEC) 6, a comtext weight adder (FAC) 7.

Power inversion unit 4 contains 8 power measurements, unit 9 and the number of parameters, division unit 10 and two combined multipliers 1 1.

Block 6 necoBOio co.

I have two bukk i b dips, a complex weight adder 3, two operational memories (03V) 12, 6j, OK 1J match.

The power measurement block 8 contains a block 5 of the slide and, a random access memory 12, three multipliers 14 and two double-drive sums - a torus 15.h

Digital adaptive (Ow antenna systems work um way.

In hell mode n. the first signal of the first block 4 power inversion and block 3 of the compensation of the first group with the ADDs of the ADC DSN 2. vector KoMHiu xs samples

(O (g TV C (C

The input of the j-ro block 3 of the compensation of the i-th group is converted to from (+ 1

score x ifj (t) live

according t in front

;: 1de x (t) x

(t) -l, tj (t-l) xy (t),

1.4 (t-D

the readout of the signal received at the first compensation input of the j-io block 3 compensation of the i-th group: the coefficient settled on the third input of the first FAC 7;

 + 1

(ABOUT

- readout of the signal, drank to the first input nepnoio FAC 7. Directly by calculation

., 40 (t) calculated by HCCOFOIO

coefficient i (t) 6

in the block FVK

with nagging

l (l-l) +

1 uj i (t) 1 lt,,

Sh i. "

 BEFORE

the value 0, (t-) x (t) d i (t), calculated previously in block 4 of the power inversion, is fed to the crucible input of block 3 compens0

At the same time, in the i-th locker there is a power inversion, at the first sign of which power is supplied

and). . x j (t,), the calculation of the coefficient dt (t) is made according to

JS Hill

With Pl p.l- 1

di (t) di (t-1) + 9 (L) (x (t) |

, r; t is a Gyrameter 9, (t) m is listed in b i i the same 4 inversions MO PI ist and (i-l) -i ipvunii, Dg (t) l. According to the calculation of di (t) in Glock 9, the pairing of a lepa is performed by calculating a pair-parameter b, | (t) in co-operation with —.onium

About Jtl (t) G, (L) di (t-I) / di (t) - the processing mode of the iOj, i N compute 1 n i pi. Spends t flax time, grish ig to np

BptMc4HOM and K OT1ChS1SCH

x (/ It - 1 + 1), i 1.. . N. I IP,, - the number of either taderl-.chp i-v j t ML h g IB shm torus p (N) in accordance with the expression

p (J (C-i + l) x (, (t-i + l) di

i 1 ... N

In the i-th power measurement blocks 4, the delays in the delay blocks 5 are equalized. After equalizing the delays of the samples of the vector p (N), the latter are fed to the second signal inputs of the last compensation block 3. Passing sequentially through (N-i) blocks 3 of the compensation of the i-th group, counting p (the vector p is converted into counting of the vector p, and being passed without changes through the i-th power inversion unit 4, goes to the output of the device ..

At the same time countdown p. arriving at the second signal input of the j-ro block 3 compensation of the i-th group, pre "(ifi-l)

is formed in countdown p, in accordance with the expression

p (iH) p (yi). D. p (Hi.; i i-t-jn HJ;

() by multiplying the reference P tj,

received at the second compensation input j-ro block 3 compensation of the i-th group, and the weighting factor 1 h j received at the third input of the second FAC 7, followed by summing up the result and reference I 4} received at the first

R .

the entrance of the second FAC 7.

Thus, the vector p samples are removed from the signal outputs of the power inversion unit 4 sequentially in time with a delay of 1 clock cycle, starting with the last block 4. The counting y (corresponds to the output signal to the output beam generated at the i-th output of DOS 2.

At the moment of time preceding the start of the adaptation mode, the contents of the RAM 12 of the FVC blocks 6 are zeroed out, and the contents of the RAM 12 of the power measurement blocks 8 are set to the a priori known amount of the self-noise power of the receiving channels.

The transition from the adaptation mode to the processing mode is carried out by fixing the contents of the RAM 12 of all units of the device.

Claims (5)

1. Digital adaptive multipath antenna system containing N-ele . 6334726 Ment antenna array, the outputs of which are connected to the inputs of the diagram-forming circuit with analog-digital converters, is so that, in order to simplify the hardware implementation and increase the noise immunity, (N-1) groups of blocks of compensation, on. Q (Ni) in the i-th group and (N-1) power inversion units; the first in-phase and quadrature outputs of the diagram-forming circuit are connected to the first signal in-phase and quadrature inputs of the first power inversion unit, the i-th in-phase and quadrature outputs of the diagram-forming circuit, where i 2 ... Nj are connected to the first signal in-phase and quadrature inputs (il) -ro of the first group of the compensation unit, the in-phase and quadrature outputs of the last compensation block of each group and the M-th power inversion unit 25 are connected to the second the signal in-phase and quadrature inputs of the same block, the information output of the 1st power inversion unit, where i ... (N-1), is connected to the informational input 30 (i + l) -ro of the power inversion unit, the first signal in-phase and quadrature the inputs and the second compensation in-phase and quadrature outputs of the i-ro power inversion unit, where i 2 ... N, are connected respectively to the first signal in-phase and quadrature outputs and the second compensation in-phase and quadrature inputs of the first compensation unit (il) -ft groups, the second signal with the phase and quadrature inputs, the first compensation in-phase and quadrature outputs, the in-phase and quadrature delay outputs g5, and the additional in-phase and quadrature outputs of the i-ro power inversion unit, where i l ... (Nl), are connected to the second signal in-phase and quadrature 50 respectively the outputs, the first compensation in-phase and quadrature inputs, the in-phase and quadrature delay inputs, and the additional inputs of the first compensation block of the i-th group, the first signal in-phase and quadrature outputs, and the second compensation tional phase and quadrature inputs j-ro unit group, where j compensation 2 ... (N-i), (N-2), 35 connected respectively to the first signal in-phase and quadrature inputs and the second compensation in-phase and quadrature outputs (jl) -ro of the compensation block (1 + 1) -th group, the second signal in-phase and quadrature delay inputs and an additional in-phase and quadrature input of the j-ro compensation block i-th group, where ... (Ni) i l ... (N-2) are connected respectively to the second in-phase and quadrature outputs, the in-phase and quadrature delay outputs and the additional in-phase and quadrature outputs (jl) -ro of the com block - pensations of the i-th group, and the signal in-phase and quadrature outputs of the power inversion units are outputs of the digital adaptive multipath antenna system 2. The system according to claim 1, wherein the compensation unit contains two delay units, a weighting factor generation unit and two complex weight adders, and and the quadrature components of the delay input are connected to the corresponding components of the in-phase and quadrature delay delays via the delay blocks, the first in-phase and quadrature inputs of the balance unit th coefficient are connected to in-phase and quadrature outputs of the first complex weighting adder and to the first signal phase and quadrature outputs, the second-phase and quadrature inputs of the block forming weight coefficient is connected to an additional in-phase and quadrature outputs and the additional in-phase and quadrature inputs, straight phase and quadrature block outputs the weighting factor formations are connected to the third in-phase and quadrature inputs of the first complex weight adder, the conjugate in-phase and quadrature outputs of the weighting factor formation unit are connected to the third in-phase and quadrature inputs of the second complex weight adder, the first in-phase and quad-round inputs of the first complex weight weights, the first signal in-phase and quadrature inputs, the second in-phase and quadrature inputs of the first complex weight su The mmator is connected to the first compensation in-phase and quadrature inputs and to the first compensation in-phase and quadrature outputs, the first center and quadrature inputs of the second compensation weight adder are connected to the second signal in-phase and quadrature inputs, the second in-phase and quadrature inputs of the second complex weight the adders are connected to the second compensation in-phase and quadrature inputs and to the second compensation in-phase and quadrature outputs, in-phase and quadrature output Q moves of the second complex weight adder are connected to the second signal in-phase and quadrature outputs. 3. The system of claim 1, wherein the power inversion unit includes a power measurement unit, a parameter calculator unit, a division unit, and two combined multipliers, the first 0 the in-phase and quadrature inputs of the power measurement unit are connected to the first in-phase and quadrature inputs of the first combined multiplier, to the first signal in-phase and quadrature inputs and to the first compensation in-phase and quadrature outputs, the second input of the power measurement unit is connected to the third input of the parameter calculator 0 I) a K to the second input of the second combined multiplier and to the information input, the first output of the power measurement is connected to the input of the dividing unit, the second output of the power measurement unit 5 is connected to the second input of the parameter calculator, the first input of the parameter calculation unit and to the second entrance of the first combi the output of the parameter calculation unit is connected to the information output, the in-phase and quadrature outputs of the first combined multiplier are connected to the first in-phase and quadrature inputs of the second combined multiplier and the in-phase and quadrature outputs of the second, multiplex second and quadrature output of the second combined multiplier are connected to the co-output multiplier; The second and second quad signal in-phase and quadrature inputs are connected to the signal cm: once and for each Exit and a second compensation phase and quadrature LN moves. 4. The system of claim 1, that is, that the weighting factor formation block contains a willow / 1-ki block, a complex owl accumulator, two operational storage devices and (chop oop - 1 mm , lrnm m rmokhody not): h the second delay block IK x urine: 11, respectively, to si; the heat. and i, pa mai urn soyu slyuyuschim first in-phase and kn draururno About the input of 1 MP.- - about: a new su 1mator,. nfiznoho p v chdo. Turn the gate of the conjunction block with the right: o (HHilia-ijinro l i and cdrlturnigo outputs, the inputs of the first and blocks of the chad and are connected respectively to the first m of the second opera t of the third chrom ;; -: NF IH: I and I wadratcated in (| dy comgs1. g Btcouoro of the adder ptslyuch (-n1 with i i CHHO to the first and second symphonic sphm and quadraturum inputs, in-phase and quadrature components of the in-phase and quadrature output: , “Of the axi aec (jBoro adder; iochen 1 0 five 0 five 0 five respectively, to the inputs of the first and second operational memory yi of the unit, the in-phase and quadrature output of the interface block is connected to the interface of the in-phase and quadrature output. 5. The system according to claim 1, that the power measurement unit contains a delay unit, a random access memory, three multipliers and two two-input adders, the input of the delay unit connected to the output of the operational memory, and the output of the delay unit is connected to the first input of the first nBvxBxoiioBoro adder and to the second input of the power measurement unit, the RAM accessory is connected to the output of the first two-input adder, and the inputs of the first and second multiplications The cells are connected respectively to the in-phase and quadrature components of the ps of the in-phase and quadrature input of the power measurement unit, the outputs of the multipliers are connected to the inputs of the second two-input adder, and n: - odes of the third multiplier are connected respectively to the output of the second two-input adder and to the second input of the power measurement unit , the output of the third multiplier is connected to the second input of the first two-input D) adder. FIG. Z fig.Z Fig.b