SU1624698A1 - Binary coded decimal to binary code converter - Google Patents

Abstract

The invention relates to computing and can be used in general-purpose and specialized computers for building code converters. The aim of the invention is to expand the class of tasks to be solved by providing an inverse transformation. The task is achieved by the fact that the converter of a binary-decimal code into a binary one, containing k-bit converters 1.1-1. T + 1 binary-decimal code into a binary, multipliers 2.1-2. T, summation block 4, are additionally entered 3.1-3.t switches, converters are reversible, and multipliers and switches are controllable. 1 il.

Description

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The invention relates to computing and can be used to build code converters in general-purpose and specialized computers.

The purpose of the invention is to expand the class of tasks to be accomplished by providing the possibility of inverse transformation.

The drawing shows a block diagram of the proposed converter of a binary-decimal code into a binary one.

The converter contains k-bit reversible converters of binary-decimal code to binary 1i-1m + i, multiplication blocks 2i-2m, 3i-3m switches and block 4 summation, inputs of 5i-5m + i convertible groups of bits, inputs 6i-6m of the first device constant, inputs 7i-7m of the second device constant, input 8 of the converter mode, output 9 of the converter.

Converters are designed to convert from binary-decimal code to binary and vice versa values of groups of bits coming from the inputs, respectively 5i-5 (fl + i devices. They can be implemented in various ways and means, depending on the size of the groups. For small the k-size of the groups of the converter 1i / i 1,2, ..., m + 1) can be realized in the form of a ROM. With a higher resolution of the convertible groups, the converter 1 | It is advisable to implement in the form of two specialized converters (converter of binary-decimal code to binary and converter of binary code in binary-decimal), as well as a switch, whose information inputs are connected to the outputs of specialized converters, and its output is the output of converter 1i. the same two specialized converters are connected to the input of converter 5i. The value of the signal for selecting the operating mode of the converter coming from input 8 to the control input of the switch torus, determines the direction of conversion. The width of the output codes of the converters 11-1 t + 1 must be equal to or less than the input width of the multiplier of the 2i-2m blocks of multiplication. For example, if the input width of the multiplier of the 2i-2m multiplication units is two decimal and eight binary bits, then using the 1i-1m converters, it is advisable to convert two decimal digits and six binary digits of the original operand,

In each of the multiplication blocks 2i-2m, the value of the transformed group of bits of the operand, coming from the output of block 1i, is multiplied by the value of the corresponding equivalent weight of this group, coming from the output of switch 3i. When converting to binary

The multiplication blocks 2i-2m are adjusted by the control signal from the input 8 of the device for processing information in a binary code, and when converting to a binary-decimal code, for processing information in a binary-decimal code. Blocks 2i-2m multiplication can be implemented by a variety of methods and means.

It is also possible to implement blocks 21-2m in such a way that, at their outputs, the products are formed in a multi-code, in particular in a two-wire code.

Switches 3i-3m are designed to transmit to the inputs of multiplicable blocks 2i-2m values or binary-decimal

constants (from device 6i-6m inputs) or binary constants (from device 7i-7m inputs).

Block 4 is intended for binary and decimal summation of all values.

products obtained in blocks 2i-2m multiplication, as well as the value of the lowest transformed group of bits from the output of the converter 1m-i.

It can be implemented by various methods and means, for example, in the form of a tree of two-input multi-digit universal adders with the propagation of transport. The control signal from input 8 sets the summation unit to

processing information in binary or binary-decimal code.

It should be particularly noted that the multiplication units 2i-2m and the summation unit 4, functioning in binary and decimal number systems, can be an integral part of the central computer processor and therefore do not require additional equipment for their implementation in the converter.

The basis of the work of the proposed developer is the following principle. When converting, for example, a binary-decimal code into a binary one, the source operand can be represented as

0 Pi 10mk + Pa 10 () k + ... Pm-i 102k +

+ Pm 10k + Pm + 1,

where Pi, P2Pm, Pm + 1 are the values of k groups

decimal ranks in each.

If the converter is Pi, P2, .. ,, Pm, Pm + 1

5 in binary code, and the value of the weights of the groups

10mk 10 (ro-i) k1Q2k 1Qk also provide

in binary code, after all the arithmetic operations of this expression are performed, the binary value of the source binary-decimal operand is formed. Similarly, a binary operand can be represented as the sum of the products of binary-decimal equivalents of groups of bits and binary-decimal equivalents of their weights.

The conversion in the proposed device takes place in one cycle. When converting a binary-decimal code into a binary control signal, it adjusts the 1i-1m + i converters to convert the values of the corresponding groups of decimal places into a binary code (the 1t + 1 converter converts the younger group of bits, and the 1i converter is the oldest ), switches 3i-3m - to transfer information from inputs 7i-7m of the second converter constant, blocks 2i-2m multiplication and block 4 summation - on functioning in the binary number system. Coming from the inputs 5i-5m + i of the converter, the corresponding groups of bits of the source operand are converted to binary code in converters 11-1 t + 1, respectively. In block 2, the multiplication occurs multiplying the value of the transformed group of bits of the operand coming from the output of the corresponding converter 1 (by the value of the corresponding binary equivalent weight of this group coming from the output of switch C from the outputs of the multiplications and output of the converter 1 t + 1 block 4, in which its binary summation occurs. After some time, determined by the transition time, at the output 9 of the device a final result is formed The binary signal is converted into binary-decimal. In this case, the control signal from the mode select input 8 sets the converters 11-1 t + 1 to convert the values of the corresponding groups of binary digits into the binary-decimal code, 3i switches

3m - to transfer information from the inputs 6i-6m of the first constant of the device, block 2 i-2m multiplication and block 4 summation - to function in the decimal number system.

Claims (1)

Invention A converter of a binary-decimal code into a binary code containing m multiplication blocks (mn / k - 1), where n is the number of decimal digits of the operand, k is the number of decimal digits processed on one multiplication block (k 2,3, ... n / 2), (t + 1) k-bit reversible converters of binary-decimal code to binary and summation block, the output of which is the output of the converter, j-to 0 1- - (m + lXk-bit bottom the group of inputs of the converter is connected to the group of inputs of the j-ro k-bit reversible converter of the binary-decimal code to the binary, the output of which, except for (hp + 1) -th, is connected to the input of the multiplier of the multiplication unit, the output of which is connected to the input of the j-ro summit of the summation block, the output of (t + 1) the decimal code in binary is connected to the input of the (t + 1) th summand of the summation block, characterized in that, in order to expand the class of solved problems by providing the possibility of inverse transformation, it additionally introduces m switches, the jth input first constant converter is connected to the first infor by the j-ro switch input, the second information input of which is connected to the j-th input of the second converter constant, the multiplicative j-ro input of the multiplication block is connected to the j-ro output of the switch, the control input of which is connected to the converter mode input and control inputs of the blocks multiply, summation block and k-bit reversible converters of a binary-decimal code to a binary one.