SU1624649A1 - Constant current electric drive - Google Patents

Abstract

The invention relates to electrical engineering and can be used in video recording devices. The aim of the invention is to increase speed and speed while improving reliability and simplification. The device contains a series-connected frequency-setting unit 1, a pulse shaper 6, a pulse frequency-phase discriminator (ICFD) 2, a static converter 3, and an electric motor 4. A rotating frequency pulse sensor 5 is located on the motor shaft. The inputs of the frequency comparison unit 8 are connected to the outputs of the formers 6,7, and the output through the one-shot 9 is connected to the input of the ICFD 2. This device eliminates false positives of the ICFD 2 in the drive synchronization mode by setting the desired pulse duration at the output of the single-vibrator 9. 3 Il.

Description

Fig, 1

The invention relates to electrical engineering and can be used in an automated electric drive with phase-locked speed in systems for transmitting and reproducing information, for example, in a drive for video recorders.

The aim of the invention is to increase speed while increasing reliability and simplification.

Fig. 1 is a diagram of the electric drive; Fig. 2,3 is a diagram, explaining the operation of the device.

The electric drive contains a frequency-setting unit 1, a series-connected pulse frequency-phase discriminator 2, a static converter 3, an electric motor 4, a pulse frequency sensor 5, as well as two frequency drivers 6 and 7 pulses, a frequency comparison unit 8, a single vibrator 9. The output frequency driver unit 1 is connected to the input of the first driver 6 pulses. The outputs of the first 6 and second 7 pulse shapers are connected respectively to the first and second inputs of the pulse frequency-phase discriminator 2 and the frequency comparison unit 8, the output of which is connected to the third input of the discriminator 2 through the one-vibrator 9.

The output of the sensor 5 is connected to the input of the second shaper 7 pulses. The frequency comparison unit 8 is made in the form of an AND 10 circuit, a 1 / CHI-NE 11 circuit and two counters 12 and 13 pulses, the first and second inputs of the AND 10 circuit are respectively connected with the first and second inputs of the OR-HE circuit 11 and are respectively the first and second inputs of the frequency comparison block 8, the output of the AND 10 circuit are connected to the synchronization of the first counter of 12 pulses and the zero input of the second counter of 13 pulses, the synchronous input of which is connected to the output of the OR-NOT 11 circuit, and the output to the zero input of the first counter 12 pulses, the output of which was yield 8 block.

The drive works as follows.

When the power is turned on, motor 4 begins to accelerate to synchronous speed. In this case, the inputs of the discriminator 2

the setpoint signal f0n is output from the output of the frequency setting unit 1 via the pulse shaper 6 and the feedback signal foe from the output of the rotational speed sensor 5 via the pulse shaper 7. Ton frequency is much higher

0

five

0

five

0

five

0

feedback frequency foc, which determines the high level of the signal at the output of the discriminator 2, which provides acceleration of the engine 4.

Frequency comparison block 8 serves to determine the point in time when the phase

Act drive error, where Z is the number of marks of the sensor 5, and the frequency error becomes less than A fti, and generating a signal that unlocks the pulse frequency-phase discriminator 2. Block 8 is executed as an AND 10 scheme, an OR NOT circuit 11 and two two-digit counters 12, 13 pulses. Scheme 10 allows to determine the coincidence of the input pulses of a block of 8 fon and foe in time and generates a pulse when they coincide. The OR-NOT 11 scheme generates an output pulse in the absence of fon and foe pulses simultaneously. The two-bit pulse counter 12 pulses the pulses from the output of the circuit 10. The reset of the counter 12 to the state O is carried out at the moment when the output of the two-bit counter 13 of the pulses of state 10 (level 1 at the output of the second discharge) appears. The counter 13 performs pulse counting from the output of the OR-NOT 11 circuit. The initial installation of the counter 13 is performed on a pulse from the output of the AND 10 circuit.

The operation of frequency comparison block 8 is based on determining the point in time when coincidence will occur in time.

the input pulses fon and foe of block 8 are at least two times longer. In this case, the periods of the compared frequencies differ from each other's OU by an amount not exceeding 2 tons, where t is the pulse duration, i.e. Top + 2T Tos Top - 2t (Fig. 2). With this

1x.1 1

Top 2T

OR

f, 1

op

1st1

 foe fo

Ton + 2T

1 + d

50

Where

but

2t

After the conversion, we get

 Ј / A -

fon (1 +

1-d1

) f oc fon (1

1 + b

taking into account that b 1, we get

fon + Af foc fdn -Af,

Where

Af fond1,

or

Where

(Don + D WD Woe Won - AwL,

Won # ofon; cooc pofoc; D w PQ A f1 pofond1;

, - 2n

 --Ј-

where Z is the number of labels of the pulse sensor.

At r, where T0 is the period following the pulses of the high-frequency generator in the prototype,

we obtain (i.e., the magnitude of the maximum frequency error

D WQ is the same as in the prototype.

Thus, the analysis performed shows that the error in the rotation frequency Aw Won-WQC with the repeated coincidence of the input pulses of block 8 lies in

within awl dsh - awl. When the impulse duration is set accordingly, the outputs of the formers 6.7 pulses are obtained

the required value is Yes & and the discriminator 2 is switched to proportional mode of operation when

I d w i. At the same time, the phase error Dave the instant of formation of the output impulse of block 8 is approximately equal to

7G

 that matches coincidence

pulse time f0n and foe.

The operation of frequency comparison unit 8 is explained using timing diagrams (Fig. 3), reflecting engine acceleration to synchronous speed. When there are large discrepancies in rotational frequency, the period Top of the feedback frequency exceeds the frequency Tos of the reference frequency. At the same time, single coincidences of input pulses of block 8 do not cause the appearance at the output of block 8 of a high voltage level controlling the operation of the discriminator 2, since the counter 12 pulses each time (not counting up to two) is set to 00 by a signal from the output of the counter 13. The pulse counter 13 counts the number of simultaneous pauses of the input signals (the output of the circuit OR NONE 11) between two pulses corresponding to the coincidence of the input pulses of block 8 (the output of the circuit AND 10). If the number of simultaneous pauses exceeds one, then a signal is formed at the output of the counter 13, which performs the initial installation of the counter 12

in

ten

15

20

25

35

40

45

50

55

state 00. When the number of simultaneous pauses between two pulses from the AND 10 circuit becomes equal to one (which is

corresponds to I Aw I D w), then the second pulse from the output of the circuit AND 10, the counter 12 is set to state 10, and at the output of block 8 a signal is generated that triggers the one-shot 9.

A single vibrator 9 serves to generate a pulse of a predetermined duration along the leading edge of the input pulses. The duration of the pulse is chosen in such a way as to exclude the possibility of switching the discriminator 2 to the saturation mode immediately after unlocking it.

with the appearance of two fon pulses between

two foe pulses and to ensure further operation of the discriminator 2 in proportional mode. The signal from the output of the one-shot 9 is fed to the third input of the discriminator 2 and carries out its unlocking in proportional mode of operation (phase comparison mode). The proportional mode of operation of the electric drive begins, in which the initial conditions are worked out by mistake.

in frequency of rotation I Dy Ds "oi phase-30 error. The operation of the drive in the transition from speed to speed occurs as described above.

Claims (1)

Claims of the Invention A stabilized electric drive comprising an electric motor, on the shaft of which a pulse frequency rotation sensor, a frequency setting unit, serially connected pulse frequency-phase discriminator, a static converter, the output of which is connected to the main winding of the electric motor, two short pulse pulse former and serially connected comparison unit frequency and one-shot, the output of which is connected to the third input of the pulse frequency-phase discriminator, the first The second and second inputs of which are connected via short-pulse drivers to the outputs of the frequency-driver unit and the pulse frequency sensor, which, in order to improve performance while improving reliability and simplification, the first and second inputs of the frequency comparison unit are connected respectively, to the outputs of the first and second shapers of short pulses, and the frequency comparison unit is made in the form of an AND circuit, an ORI circuit and two pulse counters, with the first and second inputs AND circuits are respectively connected with the first and second inputs of the OR-NOT circuit and are respectively the first and second inputs of the frequency comparison unit, the output of the AND circuit is connected to the synchronous input of the first pulse counter and the zero-setting input of the second pulse counter, the synchronous input of which is connected to the output of the OR circuit NOT and the output to the zero input of the first pulse counter, the output of which is the output of the frequency comparison unit. 2