RU143608U1 - STABILIZED ELECTRIC DRIVE - Google Patents

Abstract

A stabilized electric drive containing an electric motor, on the shaft of which there is a pulse speed sensor, a frequency setting unit, a pulse-frequency-phase discriminator connected in series, a static converter, the output of which is connected to the armature winding of the electric motor, two short pulse shapers and a frequency comparison unit and a single-shot in series whose output is connected to the third input of the pulse frequency-phase discriminator, the first and second inputs of which through shapers of short pulses are connected respectively to the outputs of the frequency setting unit and the pulse speed sensor, the first and second inputs of the frequency comparison unit are connected respectively to the second and third output of the pulse frequency-phase discriminator, and the frequency comparison unit is made in the form of a comparison circuit, register, counter pulses and OR circuits, the inputs of which are inputs of the comparison circuit, and the output is connected simultaneously to the clock input C register and to the R-input of the zero setting of the pulse counter, output Q rows are connected to inputs of the D-register whose outputs Q are connected to inputs of the comparison circuit, whose output is the output of the frequency comparator, characterized in that the clock pulse counter C is third input frequency.

Description

The utility model relates to electrical engineering and can be used in information transmission and reproduction systems, as well as in search and scan systems.

A device known as "Stable electric drive" [a.s. USSR No. 1624649 dated 01/30/1991, MKI ⁵ H02P 5/06], comprising an electric motor on the shaft of which there is a pulse speed sensor, a frequency setting unit, serially connected pulse frequency-phase discriminator, a static converter, the output of which is connected to the armature winding of the electric motor, two shapers of short pulses and a series-connected unit for comparing frequencies and a single-shot, the output of which is connected to the third input of the pulse frequency-phase discriminator, the first and second inputs of which are black Without the short pulse shapers, respectively, are connected to the outputs of the frequency setting unit and the pulse speed sensor, the first and second inputs of the frequency comparison block are connected, respectively, to the outputs of the first and second short pulse shapers, and the frequency comparison block is made in the form of an AND circuit, an OR-NOT circuit, and two pulse counters, and the first and second inputs of the AND circuit are combined respectively with the first and second inputs of the OR-NOT circuit and are respectively the first and second inputs of the frequency comparison unit, output with AND gates are connected to the clock input of the first pulse counter and the zero-setting input of the second pulse counter, the clock input of which is connected to the output of the OR-NOT circuit, and the output to the zero-setting input of the first pulse counter, the output of which is the output of the frequency comparison unit.

The disadvantage of this device is the narrow range of regulation associated with the dependence of the region of the initial conditions for As at the time of anticipatory unlocking from a given speed of ₃ .

The closest technical solution to the claimed device is a stabilized electric drive [Patent RU No. 2467465 of 11/20/2012], containing an electric motor, on the shaft of which there is a pulse speed sensor, a frequency setting unit, serially connected pulse frequency-phase discriminator, a static converter, the output of which connected to the anchor winding of the electric motor, two shapers of short pulses and a series-connected frequency comparison unit and a single-shot, the output of which is connected connected to the third input of the pulse frequency-phase discriminator, the first and second inputs of which are connected via short-pulse shapers to the outputs of the frequency setting unit and the pulse speed sensor, the first and second inputs of the frequency comparison unit are connected respectively to the second and third output of the pulse frequency-phase discriminator, and the frequency comparison unit is made in the form of a comparison circuit, a register, a pulse counter, a high-frequency generator and a circuit OR whose inputs are inputs and comparison circuits, and the output is connected simultaneously to the clock input C of the register and to the R-input of the zero setting of the pulse counter, the clock input C of which is connected to the output of the high-frequency generator, and the outputs Q are connected to the D-inputs of the register, the outputs Q of which are connected to the inputs of the comparison circuit, the output of which is the output of the frequency comparison unit.

The disadvantage of this device is the presence in the frequency comparison unit of a high-frequency pulse generator.

In a stabilized electric drive [Patent RU No. 2467465], to determine the moment of unlocking the ICPD, the number of pulses N of the high-frequency generator is counted between situations when two pulses of the same frequency pass between two pulses of a different frequency, which corresponds to a change in the angular mismatch of the electric drive with phase synchronization by φ ₀ (angular distance between adjacent marks of the pulse frequency sensor). The time t _Δ during which the angular mismatch of the electric drive with phase synchronization changes to φ ₀ during acceleration with a maximum acceleration ε _{m is} proportional to the counted number of pulses N of the high-frequency generator:

where T _hf is the pulse period of the high-frequency generator.

Given the fact that the area of initial conditions for organizing advanced unlocking of ICFD is advisable to choose from the conditions [Bubnov, A.V. Issues of theory and design of precision synchronous common-mode direct current electric drives: monograph. - Omsk: Editorial board of the journal “Omsk Scientific Bulletin”, 2005. - 190 p., 39 p., 94 p.],

,

where ε _m is the maximum acceleration of the electric drive, then the time tΔ is according to the expression [RF Patent No. 2467465]:

Taking into account equation (1), the calculated number of pulses N _{p of the} high-frequency generator, at which the error in angular velocity will be equal .

.

The objective of the utility model is to simplify the control circuit of a stabilized electric drive while maintaining a wide range of operating speeds.

Known stabilized electric drive, contains an electric motor, on the shaft of which there is a pulse speed sensor, a frequency setting unit, a pulse-frequency-phase discriminator connected in series, a static converter, the output of which is connected to the armature winding of the electric motor, two short pulse shapers and a frequency comparison unit connected in series and one-shot, the output of which is connected to the third input of the pulse frequency-phase discriminator. The first and second inputs of the pulse frequency-phase discriminator via short-pulse shapers are connected respectively to the outputs of the frequency setting unit and the pulse speed sensor. The first and second inputs of the frequency comparison unit are connected respectively to the second and third output of the pulse frequency-phase discriminator. The frequency comparison unit is made in the form of a comparison circuit, a register, a pulse counter, a high-frequency generator and an OR circuit. The inputs of the OR circuit are the inputs of the comparison circuit, and the output is connected simultaneously to the clock input C of the register and to the R-input of the zero setting of the pulse counter. The outputs Q of the pulse counter are connected to the D-inputs of the register. The outputs of the Q register are connected to the inputs of the comparison circuit. The output of the comparison circuit is the output of the frequency comparison unit.

The problem is solved due to the fact that the clock input C of the pulse counter is the third input of the frequency comparison unit, which is connected to the output of the frequency setting unit.

In FIG. a functional electrical diagram of the proposed stabilized electric drive.

The proposed stabilized electric drive contains a frequency setting unit 1, a pulse frequency-phase discriminator 2, a static converter 3, an electric motor 4, a pulse speed sensor 5, pulse shapers 6 and 7, a frequency comparison unit 8, a single vibrator 9. A frequency comparison unit 8 is made in the form circuit OR 10, pulse counter 11, register 12 and comparison circuit 13.

The device is connected in series with a pulse frequency-phase discriminator 2 and a static converter 3, the output of which is connected to the anchor winding of the electric motor 4, on the shaft of which there is a pulse speed sensor 5. The output of the frequency comparison unit 8 is connected to the input of the one-shot 9, the output of which is connected to the third the input of the pulse frequency-phase discriminator 2. Input A of the pulse frequency-phase discriminator 2 is connected through the pulse shaper 6 to the output of the frequency setting unit 1. Input B of the frequency-phase discriminator 2 through the pulse shaper 7 is connected to the output of the pulse speed sensor 5. The first input of the OR 10 circuit is the first input of the frequency comparison unit 8 and connected to the output B1 of the pulse frequency-phase discriminator 2. The second input of the OR 10 circuit is the second input frequency comparator 8 and is connected to the output of c ₁ pulsed frequency-phase discriminator 2. R-input of the pulse counter 11 is combined with the c register 12 and the clock terminal connected to an output of the OR circuit 10. The clock terminal c of the counter momenta s 11 is the third input of the frequency comparator 8 and is connected to the output of the frequency setting unit 1. The outputs of the pulse counter 11 is connected to the D-input of register 12. The Q outputs of register 12 are connected to inputs of the comparison circuit 13 whose output is the output of the frequency comparator 8.

Stabilized electric drive operates as follows.

When the power is turned on, engine 4 starts to accelerate to synchronous speed. In this case, from the output of the frequency reference unit 1, a pulse signal with a frequency f _op proportional to a given rotation speed of the electric motor 4 is supplied to the input of the pulse shaper 6 and to the pulse counter 11. At the output of the pulse shaper 6, a pulse signal is generated at the leading edge of the pulse f _opt duration f _op . The input signal A of the pulse frequency-phase discriminator 2 receives the reference signal , from the output of the pulse shaper 6. At the input B of the pulse frequency-phase discriminator 2 receives a feedback signal coming from the output of the pulse speed sensor 5 through the pulse shaper 7, forming a pulse along the leading edge of the pulse f _OS . At power on frequency significantly exceeds the frequency ., which determines the high level of the signal at the output A _{1 of the} pulse frequency-phase discriminator 2, which, entering the input of the static converter 3, amplifying and converting the control signal to the required current in the windings of the electric motor 4, provides acceleration of the electric motor 4 with maximum acceleration.

The frequency comparison unit 8 is used to determine the time when the error in the angular velocity Δω at the moment of the intersection of the image point of the phase path of the switching line becomes less than Δω _g by analyzing the signals from the outputs B ₁ and C _{1 of the} pulse frequency-phase discriminator 2. Pulse output B ₁ pulse frequency-phase discriminator 2 appears when between two adjacent pulses not a single pulse passes . At the output C _{1 of the} pulse frequency-phase discriminator 2, the pulse appears when between two adjacent pulses not a single pulse passes . At the moment when the error in the angular velocity Δω becomes less than Δω _g , from the output of the frequency comparison unit 8, the signal f _out through the one-shot 9 unlocks into the proportional mode of operation of the pulse frequency-phase discriminator 2.

The one-shot 9 serves to generate a pulse of a given duration, eliminating the possibility of switching the discriminator 2 to saturation immediately after it is unlocked when two pulses pass between two pulses and providing further operation of the discriminator 2 in proportional mode along the leading edge of the input pulse.

The frequency comparison unit 8 operates as follows.

In the block, the number of pulses N of the reference frequency f _op is counted between situations when two pulses pass one

frequency between two pulses of a different frequency, which corresponds to a change in the angular mismatch of the electric drive with phase synchronization by φ ₀ . The time t _Δ during which the angular mismatch of the drive with phase synchronization changes to φ ₀ during acceleration with a maximum acceleration ε _{m is} proportional to the counted number of pulses N of the reference frequency:

where T _OP is the pulse period of the high-frequency generator.

Taking into account (2) and (3), the estimated number of pulses N _{p of the} reference frequency f _op at which the error in angular velocity will be equal to .

.

When a second pulse of one frequency passes between two pulses of a different frequency from output B ₁ (during acceleration) or output C ₁ (during braking) of a pulse frequency-phase discriminator 2, the pulse is transmitted through the OR 10 circuit to the clock input of register 12, the Q outputs of which are recorded binary code from the Q outputs of the pulse counter 11, and to the R-input of the pulse counter 11, resetting it. In the comparison circuit 13, the value of N _{k is} compared with the Q outputs of register 13 and the calculated value of N _p . In the event that the value of N _k becomes greater than the value of N _p , a pulse f _o is generated at the output of the comparison circuit 13, which is input to the single-vibrator 9. A pulse is generated at the output of the single-vibrator 9, which is fed to the input C of the ICPD 2 and is ahead of unlocking.

The operation of the electric drive when switching from speed to speed occurs similarly to the above.

The proposed technical solution allows to simplify the control scheme while maintaining a wide range of speed control of the stabilized electric drive, by connecting the pulse counter directly to the frequency setting unit, which allows for faster unlocking of the pulse frequency-phase discriminator in a proportional mode of operation, at a time when the error value in angular velocity Δω _k becomes less than the optimal value in time of synchronization and to avoid the need to install a high-frequency pulse generator in the frequency comparison unit.

Claims (1)

A stabilized electric drive containing an electric motor, on the shaft of which there is a pulse speed sensor, a frequency setting unit, a pulse-frequency-phase discriminator connected in series, a static converter, the output of which is connected to the armature winding of the electric motor, two short pulse shapers and a frequency comparison unit and a single-shot in series whose output is connected to the third input of the pulse frequency-phase discriminator, the first and second inputs of which through shapers of short pulses are connected respectively to the outputs of the frequency setting unit and the pulse speed sensor, the first and second inputs of the frequency comparison unit are connected respectively to the second and third output of the pulse frequency-phase discriminator, and the frequency comparison unit is made in the form of a comparison circuit, register, counter pulses and OR circuits, the inputs of which are inputs of the comparison circuit, and the output is connected simultaneously to the clock input C register and to the R-input of the zero setting of the pulse counter, output Q rows are connected to inputs of the D-register whose outputs Q are connected to inputs of the comparison circuit, whose output is the output of the frequency comparator, characterized in that the clock pulse counter C is third input frequency.