SU1624472A1 - Device for simulating queueing systems - Google Patents

Abstract

The invention relates to specialized computer hardware and is intended to simulate queuing systems. The purpose of the invention is to expand the functionality of the device by adapting the bill to the queue length based on the decisions on the possibility of queuing. The device contains a random number sensor, a random pulse generator, a comparison circuit, a reversible counter, four OR elements and K queue modeling channels, each of which contains a prohibition element, a subtracting counter, an OR element, a group of AND elements, two AND elements, and also three delays. 1 il.

Description

The invention relates to specialized computer hardware and is intended to simulate the operation of queuing systems.

The purpose of the invention is to expand the functionality of the device by adapting the requests to the queue length by deciding whether the application can be queued when it enters the system.

The drawing shows a diagram of the device.

The device contains the first element OR 1, the sensor 2 of a random number, the reversible counter 3 numbers of the application, the comparison circuit 4, the second element OR 5, the fourth 6 and the third 7 elements OR, the generator 8 random pulses, group 9 of the K queue modeling channels, each of which contains the element 10 prohibition, the first 11. the second 12 and the third 13 delay elements, the second 14 and the first 15 elements And subtractive counter 16, the element IL And 17, the group of elements And 18.

Subtractive impulse counters 16 are designed to memorize the application number when it is queued and to store the current application number in the queue during operation of the device.

The OR elements 17 control the operation of the interdiction elements AND 15 and 10 in such a way that, if the subtracting counter is busy, the interdiction element 10 is kept closed by the corresponding input and the AND 15 element is in the open state so that the subtracting input of the counter 16 passes pulses from generator 8.

The reversible counter 3 of each application assigns a number at the time it is queued. When servicing a previously submitted application, this number is correspondingly reduced.

The generator 8 simulates the operation of the service device. When serving on his

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 starting voltage, it produces a random sequence of pulses. the impedances between which the np are distributed to the required law. When the starting voltage is removed, generator 8 stops working.

Comparison scheme 4 is designed to compare the number assigned to the application at the time of its receipt with the number generated by the sensor 2 of a random number and received and based on the results of the comparison about the possibility or impossibility of filing the application P or more. the output of the circuit L through the open element M 14 resets the corresponding subtracting counter to the initial state and reduces by one the content of the reversible counter 3.

Making decisions about the possibility or impossibility of enqueuing a post / queued application is based on the following provisions. The gerator 8 simulates the operation and maintenance of applications with a given law of the distribution of intervals between pulses that simulate the duration of service. If the mathematical prediction of the length of an axle is equal to Tobs, then the product T05c P | is equal to the average waiting time of the service request, where ui is the number assigned to the system at the time of the post / play-in system. Sensor 2 triggers

with; - Ie chi, according to p, where Tdsp - dopu o (ic

Steam The waiting time of the request for service is the moment of its arrival. Thus, the comparison scheme compares two numbers that are accurate to a constant nTrHR,

common multiplier - - equal to the permissible

1 both

waiting time for applications in the front of the house (number from sensor output 2) and average waiting time for a given application (number from outputs of elements 18). The signal at the output of the comparison circuit appears in the case when the permissible time spent on the queue is less than the required service waiting time. This signal sets the corresponding counter 16 to the initial state and reduces the contents of counter 3 by one. If the PC has the possibility of waiting for these changes in the scheme does not occur,

The device works as follows.

In the initial state, all counters are reset to zero. Therefore, the element) 10 prohibitions are open at the control input, generator 8 is not running.

When applying for one of the inputs of the device, it passes open

bans element 10 and through element OR 1 triggers sensor 2 and increases by one the contents of counter 3. After a time determined by the duration of transients in the element OR 1 and the revision counter 3, a signal appears at the output of delay element 11, which records the contents counter 3 to subtractive counter 16. This simulates the assignment of the received application number

5 queues for service. At the output of the element OR 17, a signal appears that closes the corresponding prohibition element 10, preventing the receipt of the next application from this source until the release

0 places in line. Thus, only one application can be queued from each source at a time. The rest are rejected. Simultaneously with the closure of the element 10 prohibition through the element OR 7

5, a signal is applied to the enable input of the generator 8, which starts and starts simulating the maintenance of the application. Through the time required for transients in the counter 16

0, when a number is written into it, a signal appears at the output of delay element 12 and the contents of counter 16, through a group of elements 18, are read into comparison circuit 4. At the same time by the same signal through the element

o OR 6, comparison of the numbers in comparison scheme 4 is permitted. If the allowable waiting time for the service request is less than the required one, then the output of circuit A is a pulse that through the element OR 5

subtracts 3 units from the counter, thereby imitating care from the queue because it is impossible to wait for service. After the time required for the comparison by the comparison circuit 4, signal5 from the output of the delay element 13 opens an element 14 and a pulse from the output of the comparison circuit through the element 14 causes the counter 16 and the corresponding channel to simulate a queue to its initial state 0, opening it for wok from the same source. If at the input of the element OR 7 there are no signals from other queuing channels, then the generator 8 is stopped and the device goes to the initial

5 state.

The pulses of the served quota from the output of the generator 8 each time reduce by one the contents of the counter 3, and through the open element 15 are fed to the subtracting input of the subtractive counter 16,

reduce the number on the front of the unit. When the counter is reset, the 16 queue modeling channel goes to the initial state and is ready to be received in the next queue.

Processes similar to those considered in one queue simulation channel also occur in other channels.

The duration of the pulses simulating the input applications, the pulses of the generator 8 and the comparison circuit 4 is chosen to be minimal. At the same time, the probability of coincidence of two signals is almost zero.

The accuracy characteristics of the simulated system can be determined from the readings of the meters connected to the outputs of various elements of the device.

Claims (1)

Claims An apparatus for simulating queuing systems, comprising a random pulse generator, a first element OR, K queue modeling channels (where K is the number of queuing sources), each of which contains an OR element, three delay elements, two AND elements, an element a ban and a group of elements And, with each queue modeling channel output of the ban element connected to the input of the first delay element, the output of the device’s random pulse generator is connected to the first inputs of the first And elements all The queue simulation channels, characterized in that, in order to expand the functionality of the device by adapting the request to the queue length, it additionally contains the second, third and fourth OR elements, a random number sensor, a comparison circuit and a reversible counter of the number ei, while Each channel of the queue simulation is entered into a subtractive counter, in each channel of the queue modeling the output of the first delay element is connected to the input of the subtractive counter record and the input of the second delay element connected to the first inputs of the elements AND of the group and the input of the third delay element, the output of which is connected to the first input of the second element AND, the output of which is connected to the reset stroke of the counting counter, the subtracting input of which is connected to the output of the first element And, the bit outputs of the counting counter are connected respectively with the second inputs of the elements AND of the group and the inputs of the element OR, the output of which is connected to the second input of the first element AND and the control input of the prohibition element, the outputs of the elements of the channel ban simulated and the queues are connected respectively to the inputs of the first element OR device, the output of which is connected to the trigger input of a random number sensor and the summing input of the reversible meter of the application, the subtracting input of which is connected to the output of the second element OR of the device, the discharge outputs of the reversible meter of the application connected, respectively, to the bit inputs of the subtracting counters of the channels of the queue modeling, the outputs of the elements OR of which are connected to the inputs of the third element OR of the device whose output Connected to the enable input of the random pulse generator, the output of which is connected to the first POSCETE of the second element OR device, the outputs of the second delay elements of the queue modeling channels are connected respectively to the inputs of the fourth element OR of the device, the output of which is connected to the comparison comparison input of the comparison circuit, information inputs the first group of which is connected respectively to the outputs of the random number sensor, the output 0 A smaller comparison circuit is connected to the second input of the second element OR device and the second inputs of the second elements AND channels of the queuing modeling outputs of the same elements AND groups of which 5 through mounting OR and are connected to the corresponding inputs of the second group of comparison circuits.