SU1599817A2 - Apparatus for checking digital instruments - Google Patents

Abstract

The invention can be used to calibrate amplitude phase and frequency modulation meters having output code signals corresponding to the measurement results. The purpose of the invention is to expand the range of possible combinations of simultaneously reproducible values of the maximum range and repetition frequency of the variable component of the parameter (amplitude, phase and frequency) of the output signal of the device. For this, the device containing the source of the reference signal, the modulator 2, terminals for connecting the rotating instrument 3, block 4 of code subtraction, block 5 of registration, generator 6 clock pulses, reversible counter 7 pulses, decoder 8, trigger 9 reverse, elements AND 10 and 11, a controlled frequency divider 12, a synchronous frequency divider 13, a logic signal source 14 and switches 15-17, switching unit 18 and shapers 19, 20 short pulses are introduced, and the reference signal source 1 is designed as a frequency converter, which contains An IT divider (or multiplier) 21 frequencies and a pulsed voltage-to-harmonic conversion unit 22. The switching unit 18 and the first short pulse driver 19 synchronize the change of the control code at the input of the modulator 2 and pass through the zero output signal of the frequency converter 1. This eliminates distortions during the change of the control code. 1 hp f-ly, 2 ill.

Description

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at the same time reproducible values of the scientific research institute of the maximum range and repetition frequency of the variable component of the parameter (amplitude, phase and frequency) of the output signal of the device. For this, the device containing the source of the reference signal, the modulator 2, terminals for connecting the rotating instrument 3, block 4 of code subtraction, block 5 of registration, generator 6 clock pulses, reversible counter 7 pulses, decoder 8, trigger 9 reverse, elements AND 10 and 11, a controlled frequency divider 12, a synchronous frequency divider 13, a logical signal source 14 and switches 15–17, switching block 18 and shapers 19 and 20 short pulses are entered, and the source 1 of the reference signal is designed as a frequency converter, which with contains a divider (or multiplier) of 2G frequency and a pulse voltage conversion unit 22. into a harmonic signal. The switching unit 18 and the first shaper 19-short pulses synchronize the change of the control code at the input of the modulator 2 and transitions through the zero output signal of the frequency converter 1. This eliminates distortions during the change of the control code. 1 ZP .. f-ly, 2 ill.

The invention relates to a measurement technique and can be used to calibrate a measure of the magnitude of the maximum range of a variable component of a parameter (amplitude, phase, frequency) of a signal having output code signals corresponding to the measurement results.

The purpose of the invention is to expand the field of application of the device by expanding the range of possible combinations of simultaneously reproducible values of the maximum swing and repetition rate of the variable component of the parameter (amplitude, phase or frequency) of the output signal of the device.

Figure 1 shows a block diagram of a device for checking digital instruments; in fig. 2 - time diagrams that show his work.

The device contains a frequency converter 1, a modulator 2, terminals for connecting a scanned device 3, a block reading unit 4, a recording unit 5, a clock pulse generator, a reversible pulse counter 7, a decoder 8, a reverse trigger 9, the first 10 and the second 11 AND elements, a controlled frequency divider 12, a synchronous frequency divider 13, a logic source 14, three switches 15-17, a switching unit 18 and two formers 19 and 20 short pulses.

 Frequency converter 1 is connected to the input of the modulator 2, the output of which is connected to the input of the switch. 5

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device 3, the code output of which is connected to the first input of block 4 of the code subtraction. The input of unit 5 of registration is connected to the output of unit 4 of reading codes. The output of the reversing: counter 7 pulses is combined with the input of the decoder 8 and connected through the switching unit 18 to the control input of the modulator 2. The first input of the reverse trigger 9 is connected to the output of the decoder 8, the second input through the first switch 15 with the output of the reverse pulse count 7, direct output through the first element AND 10 - with a summing input, and inverse output through the second element 11 - with the subtraction input of a reversible counter 7 pulses. The input of the controlled frequency divider 12 is connected to the generator output of 6 clock pulses. The input of the synchronous frequency divider 13 is connected to the output of the controlled frequency divider 12, and the output through the second switch 16 is connected to the second inputs of the first IO and the second 11 And elements, respectively. The output of the source 14 of the logic signal through the third switch 17 is connected to the second input of the block 4 of the code subtraction. The control input of the switching unit 18 through the first short pulse shaper 19 is connected to the output of the frequency converter I, whose input is connected to the generator output 6 of clock pulses. owls The input of the second shaper 20 short pulses connected to the output of the decoder 8, and the output is connected to

(figure 2, l). In this case, 1 is set at the inverse output of the flip-flop 9 for the reverse and the reversible counter 7 starts operating in the subtraction mode. At the moment of zeroing the counter 7, a signal appears at the output of the decoder 8 (FIG. 42, C), again tilting the trigger 9 (FIG. 2, L) and converting the reversing counter 7 to the add mode.

As a result, using a reverse pulse counter 7, a cyclic sequence of control codes of the modulator 2 is generated, varying from zero to a certain maximum value specified by

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the installation inputs of the I frequency converter, the controlled dapitel 12 frequency and the synchronous divider 13 frequency.

Frequency converter 1 contains a frequency divider (or multiplier) 21 and a pulsed voltage conversion unit BLB 22 into a harmonic signal.

A frequency divider (multiplier) 21 is connected between the output of the clock pulse generator 6 and the input of the pulse voltage conversion unit 22 to a harmonic signal, the output of which is connected to the input of the modulator 2.

The device for checking digital devices works as follows.

The clock pulse generator 6 generates a continuous sequence of rectangular pulses (FIG. 2, a), which through the frequency converter 1 (FIG. 2, m) is fed to the input of the modulator 2, as well as through dividers 12 and 13 and switch 16 (FIG. 2, b) - to the inputs of elements AND 10 and 11. Depending on the state of flip-flop 9, reverse (Fig. 2, l), this sequence is fed either to the summation input (Fig. 2, c) or to the subtraction input (Fig. .2, d) a reversing counter of pulses 7. Suppose that at the direct output a trigger a 9 is present 1 (FIG. 2, l) and a reversing center tchik 7 works in addition mode. As the capacitance of the counter 7 is filled, on its parallel outputs (the first one - Fig.2, d; the second Fig.2, e; the third one - Fig.2, g; etc.) the signals in the form of level differences appear voltage, one of which through the switch 15 (figure 2, k) overturns the trigger 9

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using switch 15 and the corresponding predetermined value of the variable component of the signal parameter, and then again to zero.

The controlled frequency divider 12 is designed to change the repetition period of the control code generated by using a reversing counter of 7 pulses.

A synchronous frequency divider 13 ensures that the repetition period of the generated control code is constant during the change of the magnitude of the variable component of the signal parameter by the operator. At the same time, using the switch 16 synchronously with the change of the variable component being set, the division coefficient of the divider 13 changes. Thus, if the variable component of the signal parameter decreases, for example, twice (the slide switch 15 moves to the left by one division), the division of the synchronous frequency divider 13 must be doubled (the slide switch 16 simultaneously moves to the right by one division).

The control code is transmitted to the input of the modulator 2 via the switching unit 18 (FIG. 2, o, p, p, etc.) only by commands produced by the short pulse shaper 19 (FIG. 2, n) at the instants of transition through zero of the output signal of the frequency converter 1 ((lg.2, m).

The output undistorted modulator 2 signal (Fig. 2, c) with a cyclically varying parameter within specified limits (amplitude, phase and frequency) is fed to the input of the device under test 3. At the code output of the device 3, the measurement result of the variable component value of the signal parameter is obtained which is fed to the first input of block 4 subtraction codes. A code whose value corresponds to a predetermined value of the variable component of the signal parameter is fed through the switch 17 to the other input of block 4 from the source output -14 of the logic signal. The difference between the measured and actual values of the variable component, corresponding to the error of the checked instrument 3, from the output of block 4 is 15

the code reads into registration block 5,

With the help of the signal appearing at the output of the shaper 20 short pulses (Fig. 2, and) at the moment of the complete zeroing of the reversible counter of 7 pulses, an additional synchronization of the control code for- mi channels of the control code (dividers 12 and 13 of the frequency and reversible counter 7) and the reference signal (frequency converter 1) between each other.

Thus, the advantage of the proposed device for calibrating digital devices over the prototype is 3 TOMj, which, thanks to the provision of a link with the newly introduced switching unit 18 and the generator 9 short pulse, changes the control code at the input of the modulator 2 to transitions through. zero output of the frequency converter 3, the distortion of the output signal of the device is completely eliminated - especially manifested in the prototype device in the case when the period of change of the control code in the process of changing the maximum sweep and repetition frequency of the variable component of the output signal is less than the period of the reference voltage supplied to the modulator input.

The intermittent repetition error of the maximum range of the variable component of the output signal of the device is eliminated by binding using converter 1 of frequency 5 whose input is connected to the output of generator 6 of clock pulses j, the moment of generating the maximum control code corresponding to that specified in the process of turning - ki value of the maximum range, exactly to the moment of transfer of the control code to the input of the modulator 2. Moreover, the additional synchronization of the channels is formed Hovhan control code modulation - torus 2 and a reference signal to each other allows to exclude completely the possibility of phase Mismatch

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vania, which could result from the collapse of any of the frequency dividers.

As a result, the area of application of the device is expanded by expanding the range of possible combinations of simultaneously reproducible values of maximum range and purity of repetition of the variable component of the parameter (amplitude, phase or frequency) of the output signal of the device and, therefore, the accuracy of digital instrument calibration increases.

Claims (2)

Invention Formula i Device for calibration of digital devices according to avt.S. No. 1337844, characterized in that, in order to expand the scope of application, a switching unit and two short pulse formers are introduced into it, and the reference-signal source is designed as a frequency converter, the output of the reversible pulse counter connected to the input of the switching unit connected to the output the control inputs of the modulator, and the control input of the switching unit through the first driver of short pulses is connected to the output of the frequency converter, the input of which is connected to the output of the clock generator, the input of the second short pulse shaper is connected to the output of the decoder, and the output is connected to the installation inputs of the frequency converter, the controlled frequency divider and the synchronous frequency divider. I 2. The device according to claim 1, which means that the frequency converter contains a frequency divider or multiplier, the counting input of which is an input, and the setup input is the installation input of the frequency converter, and a pulse voltage conversion unit a harmonic signal whose input is connected to the output of a frequency divider or frequency multiplier, and the output is the output of a frequency converter. - -VJ HH V 4J H -v Cjioeo) "u5 Editor A.Lezhnina Compiled by S. Khromov Tehred M. Didyk Cho -W -Vl -c, L H with; C s f  WITH ъ sa sa Cs cs sz about: uh one but l i: :)  3 h g I . k and J N R : .J : t Ci С; about Proofreader O. Tsiple