SU1594560A1 - Device for modeling communication system - Google Patents

Abstract

The invention relates to special computer technology and is intended to simulate various modes of communication systems in a changing noise environment. The purpose of the invention is to expand the functionality of the device by taking into account the current number of message re-requests. This goal is achieved by introducing a switch device, which additionally counts the number of message re-requests and the current number of message re-requests. 1 il.

Description

The invention relates to Hbw computer hardware and is intended to simulate various modes of communication systems under conditions of a varying disturbance installation.

The purpose of the invention is to expand the functionality by taking into account the current number of message retries.

The drawing shows a diagram. devices.

The device for modeling the communication system comprises a pulse generator 1, a switch 2, a first element OR 3, an address counter 4, a first delay element 5, a permanent storage unit 6, a first comparison unit 7, a third delay element 8, a second OR element 9, a generator 10 pseudo-random numbers, decoder 11, shift register 12, AND-OR 13 element,

the message counter 14, the counter 15 messages transmitted without re-calling the second delay element 16, the second comparing unit 17, the subtracting unit 18 and the switch 19.

The device works as follows.

In the initial state in the 10 pseudo-random number generator, the single-formation mode is set to -. number-distributed random numbers. set1 at a given interval K, L, codes of numbers corresponding to the upper values of each m-th segment, M, are written into the persistent memory .6 into which the interval K, b is divided. At that, the length of the m-th segment is proportional to The occurrence (t-1) of the error in the block (message). At the first input of the comparison circuit 17, the code of the number of messages N. is connected.

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analyze. Through the combined commodity and information inputs of the region of 12 shift, a quantity Q | pulses, which characterizes the correction ability of the code used in the simulated communication system.

The pulse of the initial setup is set to 4, 14, and 15 and the shift register 12 is set to zero and a generation of 10 pseudo-random pulses is triggered, on the view of which the first slider number is input to the input of 7 comparison.

), When the switch 2 is closed, the device operates; clock pulses from the output of the generator 1 are placed with the interval at the counting input of the counter 4, the output code Q. of which is | the address of the cell of the constant remembering block b, the contents of which are by the clock pulse signal ps | steps on the second input of block 7 cf | avneni. After a time interval necessary for the counter to be triggered by the delay element 5, a clock pulse is sent to the control inputs of the constant Hciro of the storage unit 6 and the comparison unit 7

The clock pulse from the comparison block 7 checks the fulfillment of the condition A B. At A B, the output of the circuit 7 does not receive a signal.

: On the next clock pulse from the code of the generator 1 in the counter 4, the code of the next address is generated,. the code of the number contained in the next cell of the persistent storage unit 6 is read and compared in scheme 7 with the code of the same pseudo-random number set at the output of the generator 10.

The procedure for generating addresses Q and comparing the codes is carried out until the condition A B is fulfilled, and a pulse is generated at the output of the comparison circuit 7, which arrives at the counting input of the counter 14 and is written in it and to the control input of the decoder 11, allowing the decryption operation in it code Q. connected from the output of the counter 4. If the condition Q is fulfilled. Q at the output of the element AND-OR 13 receives a pulse, which is recorded in the counter 15.

Through the time interval of decoding code Q. in the decoder 11, defined by the element 8 delay, on control.

The generator input 10 receives a control pulse, which forms a new random number Q. At the same time, the pulse arrives at the zeroing input of counter 4 and zeroes it, preparing

the beginning of a new cycle of the formation of codes in the counter 4. At the same time, the code of the number N, recorded in the counter 14, is controlled by the control pulse from the output of the delay element 16 to the input

comparison circuits 17; when the condition N N c is fulfilled, a pulse arriving at the control input of the switch 19 is forged at the output of the circuit 17. The pulse from the delay element 16 is also fed to the subtraction enable input of the subtractor 18. It subtracts the codes generated in the counters 14 and 15-4N N - N (O). By control

the impulse arriving at the control input of the switch 19, at the output of the latter, the number of repeated requests LA N – N is formed, in the absence of the control impulse

Another switch output generates the current number of JN message requests. Consequently, on the outputs of the device for modeling the communication system, the results are obtained.

analysis of messages: at the output of the counter. 14 - the code of the initial number of messages, at the first output of the switch 19, the code of the number of retries is specified, at the second output of the switch 19 - the code

 the current number of retries, and the output of the counter 15 is the code of the number of N messages transmitted over the communication channel without re-queries for a given corrective ability of the Q code.

Claims (1)

Invention Formula A device for simulating a communication system, comprising a pulse generator, an address counter, a message counter transmitted without re-querying, a persistent storage unit, first and second comparison units, a pseudorandom number generator, a decoder, a shift register, an AND-OR element, first, second and third delay elements, first and second OR elements, subtraction unit, output the pulse generator is connected via a switch to the counting input of the address counter and the input of the first delay element, the zeroing inputs of the message counter transmitted without the request request and the shift register, the first inputs of the first and second ISh1 elements are combined and connected to the initial setup input of the device, the bit outputs of the address counter are connected respectively to the information inputs of the decoder and the address inputs of the permanent storage unit, the output of the first delay element is connected to the read input by the storage unit and the comparison input of the first comparison block, the first and second information inputs of which are connected respectively to the output of the pseudo-random number generator and the output of the permanent storage block, the output of the first block compares the NIN connected to the control input of the decoder, the counter input of the counter messages and inputs of the second and third delay elements, the output of the second delay element is connected to the comparison enable input of the second comparison unit, the output of the third delay element Connected to the first inputs of the first and second IDN elements, the output of the second OR element is connected to the start input of the pseudo-random number generator, and the output of the first OR element is connected to the zeroing input of the address counter, the first input, the second comparison unit is five the input of specifying the number of analyzed messages of the device, the second input of the second comparator unit is connected to the output of the message counter, the first input of the subtraction unit and is the output of the code of the initial number of device messages, the decoder outputs are connected respectively to the first group of inputs of the AND-OR element, to the second group of inputs of which respectively, the bit outputs of the shift register are connected, the clock and information inputs of which are combined and connected to the installation input of the device boundary conditions, the output element The AND-OR is connected to the counting input of the counter of messages transmitted without a re-request, the output 0 of which is the output of forming the code of the number of messages of the device and connected to the second input of the subtractor, characterized in that, in order to expand the functionality, it will notice the accounting for the current number of re-requests messages, a switch is entered into it, the information input of which is connected to the output of the subtraction unit, the output of the second comparison unit is connected to the control input of the switch, the first and second outputs of the switch Are, respectively, the output of forming the number of re-queries and the output of generating the current number of re-queries of the device messages, and the output of the second delay element is connected to the enable input of the subtraction unit. S 0 five ..