SU1589072A1 - Measuring instrument - Google Patents

Abstract

The invention relates to the field of measurement technology and can be used to process and study images, for example, in evaluating their qualities. The purpose of the invention is to provide a microphotometric signal and visualization of the entered or processed image fragment. The device contains a measuring microscope consisting of an optically conjugated illuminator unit, a viewing table with drives and linear displacement sensors, a projection optical system, an optical separation unit for the luminous flux, a glass plate with a dashed grid, an optical viewing system, a matrix photodetector, and also a control and synchronization unit, a logarithmic amplifier, an analog-to-digital converter, a computing device, an input device, a recording device, and deokontrolnoe device with respective linkages. By combining visual and microphotometric measurements, the range of tasks to be solved expands, time is reduced, and operator comfort is enhanced. 1 il.

Description

The invention relates to a measurement technique and can be used for processing and studying images, in particular, in solving the problem of evaluating their quality.

The aim of the invention is to expand the field of application of the device by providing micrometric input and visualization of the entered or processed image fragment.

FIG. 1 shows the structural scheme of the proposed measuring device; in fig. 2 shows a variant of the control and synchronization circuit.

The measuring device contains a measuring microscope consisting of

from block 1, the illuminator, viewing table 2, drives 3 and sensors 4 linear displacements, projection optical system 5, block 6 of optical separation of the luminous flux, glass plate 7 with a dashed grid, optical system 8 of visual observation, matrix photo-receiver device (mfpu 9, a logarithmic amplifier 10, an analog-digital converter 11, a control and synchronization unit 12, as well as a computing device 13, an input device 14, a recording device 15, and a video monitoring device 16.

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The I block 1 illuminator is designed to create a beam of light sufficiently j high and spatially uniform: luminance to illuminate the image section under consideration. The brightness of the light should not vary by more than 1-2% in a time sufficient for measurement.

Projection optical system 5 is designed for building deistzi. image of the analyzed fragment in the planes of the photosensitive surface of the mfpu 9 and glass n; Noah plate 7 with a dashed grid. : It consists of two parts: a permanent and an interchangeable one (a replaceable projection lens designed to change the magnification ratio of a projection-optical optics system). Block 6; Optical separation of the light flux is intended to optically divide the projected image of the analyzed fragment into two real-time images: the first image is in the plane of the glass plate 7 with a dashed grid, the second image is in the plane of the photosensitive surface of the mfpu 9. Glass plate 7 with a dashed grid is intended for overlaying considered by the operator through the optical system 8 of visual observation of the image of the analyzed fragment of the dashed grid. The grid is intended for exact orientation of the anapied sample on the viewing stand 2 relative to the mfpu 9 / pointing at the image points chosen by the operator, and controlling the boundaries of the microphotometric fragment. The dashed grid can be made in the form of a central overlap, around which the projection of the work area of mfpu 9 is indicated,

The MPPU 9 is intended for spatially sampled microphotometric input of a fragment of the image projected onto its photosensitive surface and can be - implemented, for example, using charge-coupled devices (CCD). 1It is advisable to use a matrix CCD with separated photosensitive charge accumulation matrix and storage register array

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charges for their subsequent reading.

The logarithmic amplifier 10 is designed to amplify and convert the input signal proportional to the transmittance of the sample g into a signal proportional to the optical density D lg / 1 (C), and can be performed, for example, on the basis of an operational amplifier.

Analog-to-digital converter 11 is designed to convert an analog input signal proportional to optical density into a digital code. The control and synchronization unit 12 is designed to generate accumulation and reading control signals from the accumulated electrical charges from the matrix photoreceiver 9, as well as synchronize the operation of the analog-digital signal. converter 11. The specific design of the control and synchronization unit 12 depends on the type and design. Much implementation of the mfpU, page Keturah control signals po- stupayushih input control and synchronization block. As applied to the television standard of signal generation, blocks similar to the control and synchronization unit were obtained by the generation of synchronous generators.

Assume that the MFP is made in the form of a CCD with separated storage (photosensitive) arrays, parallel frame transfer of charges from the storage matrix to the storage matrix, and three-stroke transfer power. In this case, the control and synchronization unit is configured as shown in FIG. 2. The control and synchronization unit -12 contains an i7s selector, six differentiation units .18-23, three logical blocks OR 24-26, two inverters 27 and 28, three RS flip-flops 29-31, three drivers 32-34 three-stroke power which sets the generator 35, the divider 36 frequency-five logical blocks And 37-41,

three counters 42-44, a switch 45, a pulse distribution unit 46, the selector input being the input of the control and synchronization unit, the first output of the selector in parallel connected to the input of the first differentiation unit, the input of the first inverter, the first input of the first and fourth AND blocks and the first the input of the switch, and the second output is connected to the input of the fourth differentiation unit, the first input of the first counter and is the second output of the control and synchronization unit, the output of the first differentiation unit is parallel to Connected to the second input of the first and first inputs of the second and third counter and the first input of the first block OR, the output of the first inverter through the second differentiation block is connected to the second input of the first block OR whose output is connected to the first input of the first trigger, the output of which is connected to the first input the first generator, the first output of which is connected to the first input of the pulse distribution unit, and the second output through the third differentiation unit is connected to the second input of the first trigger and the second input of the first b And eye, output to. Secondly, the output of the fourth differentiation unit is connected in parallel to the first inputs of the second and third AND blocks, the output of the first counter in parallel is connected to the input of the second inverter and the second input of the second AND block, the output of which is connected to the second input of the second OR block, the output of which is connected to the first input of the second trigger, the output of which is connected to the first input of the second shaper, the first output of which is connected to the second input of the pulse distribution unit, and the second output One through the fifth differentiation unit is connected to the second input of the second trigger and the first input of the third OR block, the output of the second inverter is connected to the second input of the third AND block, the output of which is connected to the second input of the third OR block, the output of which is connected to the first input of the third trigger, output which is connected in parallel with the second input of the second counter and the first input of the third driver, the first output of which is connected to the third input of the pulse distribution unit, and the second output is connected in parallel to oromu input switch and the third input of the second counter, the output of which is connected to the third input of the switch, the output of which through sixth differentiating unit is connected to the second input of the third flip-flop and vto10

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To the input of the fourth AND block, the output of which is connected in parallel with the first input of the fifth AND block, and the second input of the third counter, the output of which is connected to the second input of the fifth AND block, the output of which is connected to the third input of the second OR block, the output of the master oscillator the frequency divider is connected to the combined second inputs of the first, second and third drivers, and the output of the distribution unit is the first output of the control unit and synchronization of the measuring device. The computing device 13 is designed for mathematical processing by specified programs of entered coordinates (with visual measurements) with output of processed results {and to device 15 for recording, correcting or processing for specified programs of entered fragment of image with output of results to registration device 25 15 or video monitoring device 16, testing commands programs set by the operator from the input device 14, generation of the control signal and clock request pulses for the control unit 12 and synchronization. Computing device 13 can be implemented on the basis of a programmable computer with a sufficient amount of RAM (32 KB or more).

The input device 14 is intended for the operator to set commands and programs for controlling the operation of the computing device 13, as well as the input Q required for performing the initial data calculations, the composition of which is determined by the specific task being solved. It can be implemented in the form of a display or teletype.

4. The registration device 15 is designed to output formalized data on the results of solving a particular measurement task or the results of processing the entered fragment 0 of the image and can be implemented as a display, teletype, etc., and in the presence of software separation, input-output computing device 13 can technically be combined with the device 14 input.

The video monitoring device 16 is intended to visualize the entered or processed image fragment, for example, for the purpose of visualization.

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control of the boundaries of the entered fragment, or the results of its processing by separate algorithms.

The device works as follows.

The analyzed sample, illuminated by a beam of light from the illuminator block 1, is located on the viewing table 2, which is moved in two mutually perpendicular directions X and Y by means of drives 3 and fixed by means of sensors 4 projection linear motion; on the optical system 5 projects the analyzed image through the optical separation unit 6 of the optical flux into the plane of the glass plate 7 with a scribble grid and onto the photosensitive surface of the matrix photoreceiver 9. Focusing Image imaging is performed by moving an optomechanical unit including a projection optical system 5, an optical separation unit 6 for luminous flux, a glass grid 7 with a microchip net, a visual observation optical system 8 and a matrix photoreceiver 9, along the optical axis: the projection optical system five,

The operator, using the visual observation optical system 8, considers the actual image of the fragment to be analyzed in the plane of the glass plate 7 simultaneously with the image of the dashed grid applied to the glass plate.

When conducting metric measurements, the operator, moving the viewing table 2 with the analyzed sample using drives, combines the various visual points chosen by him with the cross of the grid, the sensor 4 detects the movement of the viewing table, and the operator’s input from the input device 14 the current coordinates are entered at the first input into the computing device 13. After, as thus, the coordinates of all the necessary points are sequentially entered to solve a certain measuring tasks, at the command of the operator from the input device 14, the computing device 13 performs mathematical processing of the entered coordinates according to a predetermined algorithm (program) and displays the results of calculations

in a formalized form on the device 15 registration.

Thus, the task of measuring the size of the image area to be studied by microphometry can be solved. Based on these dimensions, an enlargement of the projection optical system-5 can be selected, ensuring that these dimensions match the projection of the photosensitive surface of the mfpu 9 optical densities) 1 D II (elimination of a certain number of edge rows and columns of the matrix or averaging of signals within a few decomposition elements) .

When performing microphotometric measurements, the operator, moving the viewing table or a sample on it, brings and orientates, as necessary, relative to the grid and, consequently, relative to the matrix photoreceiver 9, a fragment of the image that is subject to microphotometric input.

According to the operator's command supplied from the input device 14, the computing device 13 generates a control signal at its third output, for example, in the form of a pulse, the duration of which Tu is proportional to the accumulation time (exposure) tn, i.e. Tu t + At, where 4t is the time for personnel transfer of charges from the accumulation matrix to the storage matrix.

From the third output of the computing device, the control signal is fed to the input of the control and synchronization unit 12. By this signal, the control and synchronization unit 12 generates control pulses from its first code to the control input of the mfpu 9, which is used to force the photosensitive matrix of the mfpu 9 to be forced to zero, accumulating for some time t of charges in the photosensitive cells of the matrix, which is proportional to the illumination of these cells, and the discharge of the accumulated charges into the register (matrix) of the storage of the mfpu 9. In this case, the control and synchronization unit 12 operates as follows.

The control signal is fed to the selector 17 and then from its first in :: HAD to the input of the first differentiation unit 18, the input of the first inverter 27, the first inputs of the first 37 and fourth 40 K blocks, the first input of the switch 45. On the leading edge of the control signal allocated by the first differentiation unit 18 is reset to the initial state of the counters 42-44. In addition, the signal from the output of differentiation unit 18 is fed through the first P1LI 24 block to the first input of the first trigger 29, which is set to one. The signal from its output goes to the first input of the first imager 32, to the second input of which from the master oscillator 35 through the divider 36 pulses of the reference clock frequency are fed, the imager 32, working on the principle of a logic device, generates clock pulses at its first output transfer, which are fed to the first input of the pulse distribution unit 46 and then from its output, which is the first output of the control unit, to the mfpu 9 (personnel transfer electrodes).

Upon completion of the formation of the required number of personnel transfer pulses (with a three-stroke power supply - three pulses), the driver 32 at its second output generates a signal, on the leading edge of which, separated by the third differentiation unit 20, the signal from the output enters the second input of the first trigger 29, thereby transferring it to the zero state and removing the enabling signal for the formation of clock pulses from the first input of the first driver 32.

Thus, the control signal shaping cycle is performed for the five signals necessary for forcibly zeroing (cleaning) the MFD photosensitive matrix. From the moment of the personnel transfer of charges from the photosensitive matrix to the storage matrix, the exposure time of the expo starts.

t. While the photosensitive array is being exposed, the. it is necessary to prepare for further work the storage matrix and the output register, namely the

cleaning them out by removing the charges they contain. These operations are carried out as follows. - The signal from the output of the third block 20

differentiating, bringing to zero the first trigger 29, simultaneously arrives at the second input of the first block 37, the first input 10 of which is supplied with a control signal from the first output of the selector 17,

The block 37 forms at its output a permitting signal, which is fed through the second block of ELC 25 to the first J5 input of the second trigger 30, translating it into a single state. The signal formed at the output of the trigger 30 is fed to the first input of the second shaper 33. According to this signal, the second 20 shaper 33 from the sequence of clock pulses coming from the output of the master oscillator 35 through the divider 36 to the second input of the second shaper 33 forms the clock power pulses of the storage matrix, which from the first output of the imaging unit 33 are fed to the second input of the power pulse distribution unit 46 and then from its output to the mfpu. 30 Upon completion of the formation of the required number of clock pulses for carrying out transfer to the output register of a single line consisting of five charges (for a three-stroke supply, three pulses), the driver 33 generates a signal at its second output, the front of which is extracted by the fifth differentiation unit 22 . The signal from the output of the differential block 22 arrives at the second input of the trigger 30, thus transferring it to the zero state, while the enable signal is removed from the first input of the driver 33, and it stops clock pulse formation.

At the same time, the signal from the output of the fifth differentiation unit 22 through the third block OR 26 enters JQ to the first input of the third trigger 31, translating it into a single state. At the same time, at the output of the trigger 31, an enable signal is generated, which arrives at the first input of the third driver 34. By this signal, the third driver 34 from the sequence of clock pulses received from the output of the master oscillator 35 through the divider 36 to the second input of the third driver 34 the output register of the mfpu, which from the first output of the shaper FOR are fed to the third input of the block 46 of the distribution of power pulses and then from its output to the mfpu 9.

Upon completion of the formation of the required number of clock pulses to carry out the transfer of one charge from the output register (with three-stroke power supply — three pulses), the shaper 34 generates, at its second output, a signal arriving at

a signal is generated that arrives at the third input of the second block OR 25 and then to the first input of the second trigger 30. With this signal, the trigger 30 is transferred to the single state and then, as already described, the process of generating the matrix power clock pulses is repeated. storage and output register until m pulses go to the second input of the counter 44, which indicates the end of the charge output from the storage matrix and the output

1. - L | С1ПСП Л 1-1 ЫЛИД

the third input of the second counter 43, which is the register. Upon receipt of the first

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If there is a permitting signal at its second input from the output of the third flip-flop 31, it counts the number of pulses received at its third input. When the number of incoming pulses becomes different to the number n of elementary cells in the row (length of the output register), the counter 43 generates a signal at its output to the third input of the switch 45. 25 Switch 45, if there is a control signal at its first input from the first output select-. The torus 17 transmits a signal from its third input to the input of the sixth differentiation block 23, the output of which generates an input to the second input of the third flip-flop 31 and translates it into the zero state. At the same time, the enable signal is removed from the first input of the third driver 34 and the second input of the counter 43, the driver 34 stops the generation of the power clock of the output register, and the counter 43 returns to the initial (zero) state.

The pulse from the output of the sixth differentiation unit 23 is fed to the second input of the fourth AND block 40, which, if there is a control signal from the first output of the selector 17 at its first input, generates a pulse signal that is simultaneously fed to the first input of the fifth block I 41 and the second input of the counter 44. The counter 44 counts the number of pulses received at its second input. If this number is smaller than the number m of rows in the storage matrix, the counter 44 at its output generates an enable signal arriving at the second input of the fifth AND circuit 41, the output of which

pulse to the second input of the counter 14 split signal from the stroke of the counter. 44 is removed, which causes the fifth block AND 41 to close and the restart of the second flip-flop 30 cannot be restarted.

On the falling edge of the control signal, allocated by the inverter 27 and the second block 19 di (5) of differentiation, the signal from the output of the latter through the first block OR 24 translates the first trigger 29 into one state, after which the process of generating personnel transfer pulses as already described. However, after the formation of these pulses is completed, the feeding pulse generator of the storage matrix is no longer started, since there is no signal at the first input of the first AND 37 block, thus this block is closed and does not pass the trigger signal from the output of the third differentiation block 20.

Thus, the process of exposing the photosensitive matrix and the transfer of accumulated charges to the storage matrix has been completed. For normal operation of the control and synchronization unit, it is necessary that the minimum accumulation time of charges in the photosensitive matrix t be longer than the time required to output the charges from the storage matrix and the output register.

The withdrawal of accumulated charges from the storage matrices is performed as follows. From the third output of the computing device 13, the clock request pulses arrive at the input of the control and synchronization unit 12. For each pulse, it is necessary to organize reading of one charge. Taktovy request pulse arrives

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a signal is generated that arrives at the third input of the second block OR 25 and further to the first input of the second trigger 30. According to this signal, the trigger 30 is transferred to the one state and then, as already described, the process of generating the supply and registration clock pulses cyclically repeats output until the second input of the counter 44 receives m pulses, which indicates the end of the charge output from the storage matrix and output 1. - L | С1ПСП Л 1-1 ЫЛИД

register. Upon receipt of the first

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25, a pulse to the second input of counter 14, the decoupling signal from the counter stroke .44 is removed, which results in the fifth block AND 41 being closed and the restarting of the second trigger 30 cannot be performed.

On the falling edge of the control signal allocated by the inverter 27 and the second block 19 di (5) of fermentation, the signal from the output of the latter through the first block OR 24 translates the first trigger 29 into one state, after which the process of generating power pulses of personnel transfer is performed, as already described. However, after the formation of these pulses is completed, the feeding pulse generator of the storage matrix is no longer started, since there is no signal at the first input of the first AND 37 block, thus this block is closed and does not pass the trigger signal from the output of the third differentiation block 20.

Thus, the process of exposing the photosensitive matrix and the transfer of accumulated charges into the storage matrix has been completed. For normal operation of the control and synchronization unit, it is necessary that the minimum accumulation time of charges in the photosensitive matrix t be longer than the time required to output the charges from the storage matrix and the output register.

The removal of accumulated charges from the storage matrix is performed as follows. From the third output of the computing device 13, the clock request pulses arrive at the input of the control and synchronization unit 12. For each pulse, it is necessary to organize reading of one charge. Taktovy request pulse arrives

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The input of the selector-17 and further from its second output is fed to the input of the fourth differentiation unit 21, the first input of the counter 42, and the second input of the control and synchronization unit 12 connected to the synchronization input of the analog-digital converter 11 of the measuring instrument,.

On the leading edge of the clock request pulse, the fourth differentiation unit 21 forms at its output a signal arriving at the first inputs of the second 38 and third 39 I blocks. Counter 42 counts the number of clock request pulses at its first input and generates at its output a enable signal, if the number 1 of incoming pulses satisfies the condition 1 kn + 1, G de k 0.1 ,, .., where n is the number of elements in the row.

The signal from the output of the counter 42 is fed to the second input of the second block AND 38 and the input. Of the second inverter 28. If this signal permits, then the output of the second block AND 38 forms a signal which, passing through the second block OR 25, puts the second one into one state trigger 30.

The process of generating power pulses of the storage matrix, the signal about the end of which, coming from the output of the fifth differentiation unit 22 to the first input of the third block OR 26, starts the output pulse power supply circuit of the output register, the necessary number of clock pulses will be generated to transfer only one charge a good packet from the output register, since the first signal coming from the second output of the third driver 34 to the second input of the switch 45 will be passed by it to the input th differentiation unit 22, the signal from the output of which, input to the second input of the third flip-flop 31, it will translate into a null state, and thereby removes the enable signal from the first input shaper 34.

If there is no enable signal at the output of counter 42, which indicates that the next output charge packet from the output register of the mfpu is not the first in the line,

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The power supply pulse generation circuit of the storage matrix does not occur, since the second block 38 remains closed, however, in this case, the power supply pulse generation circuit of the output register occurs. The signal from the output of the counter 42 inverted by the inverter 28 is resolving for the third block AND 39. At the output of block 39, a signal is generated which through the third block OR 26 is fed to the first input trigger 31, thus bringing it to one state and starting the output register power pulse pattern.

 The clock request pulses are fed to the input of the selector 17 until all (n X t) charge packets are output.

Thus, the control and synchronization unit 12 ensures the operation of the mfpu in the mode of forming individual frames for a given accumulation time, which is determined by the duration of the control pulse arriving at its input.

The signal from the output of the mfpu 9 is fed to the input of the logarithmic amplifier 10 and then from its output to the input of the analog-digital converter 11. Simultaneously with the control pulses to read the next charge, a sync signal is input to the synchronization input of the analog -digital converter 11. This sync signal carries a message about the need to convert the next analog signal to the analog-digital converter 11 input into a code combination. Upon receipt of the synchronization signal, the analog-digital converter 11 is brought to the ready state for converting the next analog signal (for example, zeroed - code combination, opens the input of an analog-to-digital converter, etc.).

The output signal of the analog-to-digital converter 11 in the form of a code combination is input into the computing device 13 via its third input, after which the computing device 13 generates the next clock request pulse at its third output.

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The process is repeated until code combinations are entered into the computing device 13., corresponding to all elements of the mfpu 9, after which the computing device 13 performs mathematical processing of the entered signals according to a given algorithm (program) and displays the processing results in a formalized form on the registration device 15 or in the form of a fragment of the image on the video monitoring device 16.

To bind the measured densities by absolute value, before or after microphotometric measurements of the sample, a cycle of measurements should be carried out in the absence of the sample on the viewing table 2. The 13 values stored by the computing device are simple, previously sampled signals obtained in the absence of the analyzed sample on the viewing table 2, are used to corrections and bindings to the absolute scale of the matrix of densities 25 of the measured fragment. Correction of density values is carried out in accordance with the expression

, -jc, ffc D, -j - D,.,; i 1,2,

1llo (ks; J - 1, 2, ..., JMOtKc, 30

the matrix of optical densities of the measured fragment of the image corrected and attached to the absolute scale; the matrix of relative values of the slopes of the measured fragment of the image before the correction,

corrective matrix of relative values of densities, measured in the absence of the sample on the viewing table 2. The illuminator in the absence of viewing table 2 is absolutely uniform photosensitive photosensitive photosensitivity photosensitivity, then D ..

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Algorithms for the mathematical processing of microphotometric measurement results are set by programs compiled in advance and entered by the operator into the computing device 13 through the input device 14 or other mini-computer peripheral devices that have not been considered, but may be part of the complex.

The value of the invention is due to the following advantages: providing microphotometric image input with increased geometric accuracy due to the use of a spatial sweep defined by a rigid raster structure of the matrix photoreceiver; the possibility of a flexible mathematical processing of the matrix of optical densities of the introduced fragment of the image in order to determine the photometric or structural characteristics of the image or to improve its quality; - the possibility of visual observation of the entered or processed fragment of the image on the screen of the video monitor.

The measuring device can be used to solve a wide range of image analysis tasks, namely, assessing the quality and structural characteristics of images; visual and instrumental decoding of images; improvement of image quality due to its mathematical processing (elimination of the shift, defocusing, increasing the contrast, outlining contours, etc.).

Claims (1)

Invention Formula A measuring device containing a measuring microscope consisting of an optically coupled illuminator unit, a viewing table connected to actuators and linear displacement sensors, a projection optical system, a dashed glass plate and a visual observation optical system, and a computing device, an input device and a recording device, the output of the linear displacement sensors is connected to the first input of the computing device, the second input of which is connected to the output of the device a, and the first output is connected to the input recording devices, so that, in order to expand the field of application of the device by providing microphotometric input and visualization of the entered or processed image fragment, the optical separation unit of the light flux, matrix a photodetector, a control and synchronization unit, a logarithmic amplifier, an analog-to-digital converter and a video monitor, while the photosensitive surface of the photodetector is black From the block optical separation of the luminous flux optically coupled to the surface of the glass plate with a dashed grid, the output of the photodetector matrix device is connected via a logarithmic amplifier to the input of an analog-digital converter, the output of which is connected to the third input of the sixth device, the second and third outputs of the computing device are connected respectively to the inputs of the video monitor and the control and synchronization unit, the first and second outputs of which are connected to the input controlling the matrix photodetector of the device and the synchronization input of the analog-to-digital converter, respectively. FIG. one CMPPU