SU1582291A1 - Digit-controlled rectifier electric drive - Google Patents

Abstract

The invention relates to electrical engineering, in particular to valve actuators, and can be used in digitally controlled servomechanisms. The aim of the invention is to improve the mass and adjustment characteristics. The valve motor with digital control contains a synchronous motor 1, a three-phase bridge inverter 2, a digital rotor angle position sensor 3, a programmable control unit 6, pulse-width modulators 9, 10, a phase voltage conversion unit 14, a source voltage drift transducer 13 nutrition The change of drive operation modes is carried out by software. The introduction of the phase voltage conversion unit 14 and the power source voltage drift transformation unit 13 allows to improve the weight and size and adjustment characteristics by performing the frequency converter in the form of a three-phase bridge inverter while maintaining the sinusoidal output voltage and eliminating the influence of the power source voltage drift on the adjusting electric drive characteristics. 4 ill., 2 tab.

Description

neither The change of drive operation modes is carried out by software. The introduction of the unit voltage conversion unit 14 and the power source voltage drift transformation unit 13 allows improving the cass-dimensional and control characteristics for

by performing a frequency converter as a three-phase bridge inverter while maintaining the sinusoidality of the output voltage and eliminating the influence of the power source voltage drift on the adjustment characteristics of the electric drive. 4 ill., 2 tab.

The invention relates to electrical engineering, in particular to valve actuators, and can be used in digitally controlled servomechanisms.

The purpose of the invention is to improve the overall dimensions and adjustment characteristics.

Figure 1 presents the functional diagram of the valve actuator with digital control; in fig. 2 - diagrams of protocols for the exchange by highway; in fig. 3 shows an example of execution of an interface unit; in fig. 4 shows timing diagrams for the operation of the device.

The valve motor with digital control (Fig. 1) contains a synchronous motor 1, the root winding of which is connected to the outputs of frequency converter 2 (FC), and the shaft is mechanically connected to the digital sensor 3 of the rotor position (CDU), which outputs through a corner resistor 4 ( RU) with a control input connected to the highway 5 connected to the output of the programmable control unit 6, the interface unit 7 interface (IF) with three outputs, the inputs of which are connected to the highway 5, to the first output connected to the control input of the register 4 angles, to the second - respectively the inputs of the register of 8 characters (RZ) with three outputs, the first 9 and second 10 pulse-width modulators (PWM), the code inputs of which are connected to the highway 5, and the clock inputs to the output of the controlled divider 11 frequency (UDCH) with a frequency input, the code inputs of which are connected to the highway 5 through the register 12 of control actions (RUV), the recording input of which is connected to the third output of the interface, unit 7, node 13 converting the voltage drift of the power source 14 to the frequency (MON ) connected to h0

five

0

The total input of the controlled frequency divider is 11. Block 14 transforms 5 or phase voltages (FPFN) is made in the form of four logic inverters 15-18, three logic elements 2И-ИРИ-НЕ 19-21 and three logic elements 2И 22-24, while the outputs of logic elements 2И 22-24 form three outputs of the phase voltage conversion unit 14 (FPPH), and connected to the control inputs of the frequency converter 2, made in the form of a three-phase bridge inverter.

The first input of the phase voltage converting unit 14 connected to the output of the second pulse-width modulator 10 is formed by the combined first inputs of logic elements 2I 22-24.

A second Bxo block 14 of phase voltage conversion connected to

5 in the code of the first pulse-width modulator 9, formed by the combined fourth input of the first 19, the third input of the second 20, the third input of the third 21 elements 2I-2ILI-NOT and the input of the second logical inverter 16.

I The third input of the phase voltage conversion unit 14, connected to the third output of the register of 8 characters, is formed by the combined third input of the first logic element 2I-2OR-NO 19 and the input of the fourth logic inverter 18.

The fourth input of the phase voltage conversion unit 14 connected to the second output of the register of 8 characters is formed by the combined input of the first logic inverter 15 and the fourth input of the second logic element 2I-2 OR-20.

The fifth input of the phase voltage conversion unit 14 connected to the first output of the register of 8 characters, about 0

five

0

five

It is developed by the combined input of the third logical inverter 1 7 and the fourth input of the third Doric element 2И-2ИЛИ-НЕ 21.

The first input of the first logic element 2И-2ИЛИ-НЕ I9 is connected to (the output of the first logic inverter 15, the combined respectively the second input of the first 19, the first input of the second 20 and the first input of the third 21 logic elements 2I-2IL-NOT , the second inputs of the third and fourth logic elements 2И-2ИЛИ-НЕ 20 and 21 are connected to the outputs of the third and fourth logic inverters 17 and 18, respectively, the second inputs of the three logs are connected to the outputs of three logic elements 2 И 2ИЛИ-НЕ, respectively elements 2I.

The programmable control unit 6 contains a microprocessor (MP) 25. a random access memory (RAM) 26, a permanent memory (ROM) 27, a master oscillator (SG) 28 and a programmable timer (PT) 29.

The interface block 7 contains (fig.Z) decoder 30, register 31, three logical elements EXCLUSIVE OR 32-34 and logical element ZI 35.

The valve motor with digital control works as follows.

Exchange protocols on the highway depend on the type of control microcomputer used. Thus, when using the Elektronika-60 micro-computer electric drive locator as a programmable locator with a different address and data (BP) of the type -BUS combined, the exchange procedure is performed as follows (Fig. 2):

a) a microprocessor (MP) 25 places an address on the bus (BP), accompanying it with an exchange signal (MBP);

b) the interface unit 7 (IFBS) recognizes the address of the external device

(RU CHRUV 12, PWM 9 and 10, RZ 8 ;, remembers it;

c) when reading data from RU 4 MP 25 sets a signal Read data (DPT), interface unit 7 interface (IFBS 7) generates a low level signal on RU 4 and sets a signal Response (PT) RU 4 sets to

data line №1 25, reads the code and removes the signal of DChT, after which the IFBS 7 removes the signal OTV, and the MP 25 -, the signal MBP,

When recording data in RUV 12, PWM 9 and 10, RE 8 MP 25, it sets a signal Data recording (DZP), FIBS 7 outputs a low level signal to an external

o the device (RUV 12 or PWM 9 and 10 and RZ 8), whose address was previously placed on the trunk, the external device records data, the FBS 7 sets the signal OTV, MP 25 removes

5 DGP signal and removes data from the trunk, IFBS 7 removes the signal OTV, MP 25 removes the signal of the exchange rate.

Changing the drive's operating modes is done in software.

0 REGL program. The drive reverser is performed by the SERVO program. The change in the rotational frequency occurs under the control of the REGL program when the Q (n) setting is changed by the angle formed by some external control device. The drive stops when the current F (n) and the specified Q (n) servo shaft positions coincide by setting the program

0 REGL code Q (n) controlling the influence of load balancing moment.

The inputs D1-D3 РЗ 8 receive the codes е, the sign of the phase voltages when the MP 25 is addressed to the address РЗ 8. The specified codes are written to the РЗ 8 according to the signal generated by the IFBS 7. The digital D-inputs PWM 9 and 10 receive the codes V (, V, defining the duration of the vector of the magnetic field of the stator in the neighboring orientations. These codes depend on the angle ef of the servodin rotor rotation and are different.

The fill factor of C / E pulses of PWM 9 and 10 is associated with the code V recorded in PWM via the D input using the MP 25 code V and the frequency of the pulses f at the C input as

 , V with f T (2-5-0 where S t is the modulator size 9

and Yu; T - the period of the signal at the L-input

PWM.

MP 25 introduces the value of Q (n) specifying the angle (or speed), formed by some external control device (not shown),

five

0

five

0

five

and calculates, based on the current coordinates of the system (angle, speed, acceleration), the control code G, the modulus fG | which is then sent to control action register 12, after which the process is repeated. When calculating G, for example, the well-known PID control algorithm can be used:

G (n) G (nH) (n) -F (n); i - K2W (n) - -KjW (n) -W (n-l) L

3,

where F (n) is the code of the angle of rotation of servodin generated by the CDU 6 at the moment of time W (n) F (n) - F (n-i) is the code of the speed of servodin,

calculated MP, 25; Q (n) - the current task angle; regulatory factors; G (n-l)

W (n-l) is the previous value of the control action and speed.

The calculation of the speed code W (n) and servodin control are implemented using the SERVO interrupt service programs of the programmable timer 29. When generating the nth request, the PT 29 for interrupt control is transmitted to the i SERVO program, according to which the MP 25 is using trunk 5, the interface unit 7 interface and register 4 interface angle reads the code F of the rotation angle of the rotor of a synchronous electric motor generated by the digital sensor 3 position of the rotor and sends it to RAM 26. Next MP 25 in accordance with the program SEEV09 located in ROM 27, you OI is servodina speed code W

V

E (2S-l) sin (+) at CЈ 0, () / 6C;

E | (2S-l) ein (2 -gJrr +) | in C (2L-1) / 6, (2L-1)

E | (25-l) sin () 1Rec (2L-1) / 3, (2L-1) / 2C;

E | (2S-l) sin (- i) | with CG (2b-l) / 2, 2 () / 3C;

E | (2s-l) sin (- |) | at SEC 2 (2L-1) / 3, 5 (2L-1) / BS5

EK2S-1) sin (- -) | SeC 5 (2L-1) / 6, (2V-1) C.

W (n) F (n) -F (n-l), where F (n), F (n-l) 7 are Mil 25 angle codes F, respectively, at the nth and (n-1) -m interrupts of MP 25.

Codes F of the angle and W of the speed are used when calculating the address A of the table N of the advanced poetic-dependent modulation of the PMA of phase voltages:

(O A (n) .F (n) +2 erct8 | fw (n) g,

(2)

where b is the size of the N OPM table.

Next, the SERVO program analyzes the sign of the G code of the control action generated by the controller and, when reversed, drives the drive by shifting T of the argument B of the PKO:

Г А (п) with G} 0; In (n).,

A (n) +2 with, - (3)

In order to provide a change period of 2 JT of the PKO code, the SERVO program results in the value C (n) of the address of the PKO table in the range of 0.2 ° -l3s

C (n)

GW (n)

B (n) -2

B

at (n) .2 -1; with B (n)} 2b-1;

, B (n) +2 D with B (n) 0

(four)

Further, the MP 25 under the control of the SERVO program retrieves the element N (C) of the PKO table at address C and sends it to PWM 9 and 10 and RZ 8:

Js

is

N (C) 2J V.} + 2Z S 2

Iso j j

(five)

where V. (, l) and ek (, 1, 2) are the components of the word N, which determine the duration of the magnetic stator vector in adjacent orientations and the polarity of the voltages on the windings 1:

(6)

sin (+ Ј) | with Ceg (21-1) sinUfj ry) with CeC (2b-O / 6, ()

at

C6 (2b-1) / 3, (2b-1)

sin (2 rr-- | -)

sin (i) |

sin (i) | at (2Ь-1) / 3,5 (2Ь-1) / бС;

Bin (+) (with (2-1) / 6, (2L-1).

Ce (2b-1) / 2, 2 (2b-1) / CS; B

e (e-sign (+),

K-1,2,3, (8)

where E is the integer selection operator; sign - character selection operator:

sign, sign, HSO. The above software (1) - (8), together with hardware, including RH, PWM 9 and 10, FPPN 14 and IF 2, provides for the formation of the phase voltages U1-Uj GDI shown in FIG. The analysis of FIG. 4 shows that, for any angle of rotation of the GDI rotor, the voltage Uf-U s at the outputs of the inverter 2 accepts three possible combinations:

1. Two voltages are positive, the third is zero.

2. One voltage is positive, the other two are zero.

3. All three ty -U $ voltages are zero.

State 3 corresponds to dynamic braking by short-circuiting the core winding and ensures the linearity of its control characteristics. The transition from state I to state 2 and vice versa is accompanied by the rotation of the vector P of the stator magnetic field by 60 electrical degrees. similar to valve electric actuators

 positional switching of the phase voltages, and the orientation of the indicated states of the vector F is determined by the combination of the signals e, -s s of the signs of the phase voltages.

The required vector F of the magnetic field of the stator in the proposed drive is formed by adding the nth and pnH orientation $,, FPI of the magnetic field of the stator from a fixed set of six orientations fyf realized in statics half-bridge

C6 (2b-1) / 3, (2b-1)

(2Ь-1) / 3,5 (2Ь-1) / бС;

Ce (2b-1) / 2, 2 (2b-1) / CS; B

(7)

"W

sixtran comm switch

(.five). The specified addition is achieved by high-frequency switching of the orientation f f n + 1 and smoothing

the inductance of the windings of the pulsations of the phase current (and, consequently, the variations of the resulting, field.), and the orientations ф, ф are set using codes 6, -e, РЗ 8

and FPPN 14, and the relative time f of the stay of the MPS in the n, n + 1 orientations of x are the pulse filling coefficients of the PIM 9 and 10.

To calculate the functions y)} ъ, we require equality of the angle η of rotation of the magnetic field P to a given angle η), and the normalized module M8 of the magnetic field F is set equal to M 1/3/2. Apply the Sine Theorem to the sectors Ј n / 3, (n + 1) / 3 |, we obtain the decomposition of the vector

(p to

7i

given in table.1.

Dependence of the average values of the output voltage of the inverter 2 and E.-E-,.

phase stresses CD1 from the angle (rotation of the rotor, the scanning law given in Table 1, (f), i (V) is shown in Fig. 4. The analysis of Fig. 4 shows that, despite

the non-sinusoidal nature of the average output voltages of the inverter, the average phase voltages E, -E3 GDI are sinusoidal and angle functions (f rotor rotation and, therefore, the servodin torque does not depend on the angle ip and does not contain switching pulsations, as expected at the conclusion of the scan law for (y).

).

FPSP 14 provides, taking into account the codes e, -e3 RZ 8, the connection of the n-th orientation of the magnetic field G GDI. At the output. PWM signals 9 and 10 p, 65, pg to connect n + 1 orientation

cf with n, l,. Thus, the duration of the PG signal PWM 10 sets the time of existence of the n-th orientation φ, and the difference between the durations h and ht of the PWM signals 9 and 10 is the time of existence of n + 1-th orientation p, shifted by 60 al. hail. In view of the above, the input code V2 PWM 10 by b is determined by the scanning function Tr t + 24 given in Table 1. The expressions for the input codes V j V2 PWM 9 and 10, the corresponding functions #t f were considered earlier (see (6) ™ (8)). The output signals A, B, C of the FPPH 14, depending on the signals hf, h, of PWM 9 and 10, RZ 8 control the IF, and at zero signals A, B, C at its outputs a high is formed, and at single signals a low level of output - 2Q that caused by voltage failure. In accordance with the above description, the functioning of the PBPN 14 is shown in the following truth table.2.

power supply

Thus, the introduction of the phase voltage conversion unit 14 and the drift transformation unit 13, for example, the Excluded states of the input signals of the power source allows

hl, lg, e edBPFN 14, which are not realized during normal operation of the drive, are marked in table 2 with the x symbol. The states 1,9,17,25 and 8,16, 24,32 correspond to the forbidden combinations of 000 and 111 codes of e, -e signs of phase voltages, and states 9-16 - unused combination of 01 signals of Lg-b, PWM 9 and 10. State 2-7 op

they determine the dynamic braking of servodine (b ,,), states 26–31 determine the current one, and 18–23 define the next orientation.

Carnot maps, based on Table 2, provide minimized logical expressions for generating output signals A, B, C of FPPH 14 in the form;

,) hl-e,

(e1b1 + e3b1) hv exba + e3b, g

(9) (S)

Cehfd h. + E ,,) “,, (11)

which is fully consistent with the scheme BPNA 14, shown in Fig.1.

Other implementations of FPPH 14 based on expressions (9) - (P) are also possible.

The formation of clock pulses of the UDCH 11 with the help of the node 13 of the drift transformation, the voltage of the PSU 14 to the frequency provides a reduction of the torque pulsations due to the pulsations and the voltage drift U of the PSU 14. Indeed, the frequency of the node 13 and the frequency of the UDCH PWM pulses of 9 and 10 Ci / T Vj / CfyT V. / / (KUT) will form the average voltage at the output of the drive:

U 4J / T-Vi G / (KT) V GUm / (2 $ -1) ()

possible voltage of power supply unit 14; S, d is the PWM 9 and 10 resolution and

UCH P.

r The last expression indicates the invariance of the drive to the voltage U BP 14, which provides by. compared with the known device for reducing the ripple torque

where u is minimal

m

power supply

Thus, the introduction of a phase voltage conversion unit 14 and a drift transformation unit 13 improve the weight and size and adjustment characteristics of the electric drive by performing a frequency converter in the form of a three-phase bridge inverter while maintaining the sinusoidal output voltage and eliminating the power source voltage drift.

Claims (1)

The invention The digitally controlled valve actuator containing a synchronous motor, the root winding of which is connected to the outputs of the frequency converter, and the shaft is mechanically connected to the digital rotor position sensor, the outputs of which are connected to the highway connected to the output of the programmable unit through the angle register with the control input control interface gateway with three outputs, the inputs of which are connected to the highway, the control input of the angle register is connected to the first output, to the second The output is connected, respectively, to a record of the register of the sign with three outputs, the first and second pulse-width modulators, the code inputs of which are connected to the highway, and the clock inputs are connected to the output of a controlled frequency divider with a frequency input, the code inputs of which are connected to highway through control action register whose recording input is connected to the third output of the interface unit, characterized in that, in order to improve the weight and size and adjustment characteristics, a node is added to convert the voltage to the frequency source voltage drift connected to the frequency input of the controlled frequency divider , and a phase voltage conversion unit with five inputs and three outputs, and the frequency converter is designed as a three-phase bridge inverter, while the phase conversion unit Voltages are made in the form of four logic inverters, three logic elements 2I-2SHJ-NOT and three logic elements 2I, the outputs of which form three outputs of the phase voltage conversion unit and connected to the control inputs of the three-phase bridge inverter, the first input of the transducer unit phase voltages connected to the output of the second pulse-width modulator formed by the combined first inputs of logic elements 2I, the second input of the phase voltage converting unit connected to the output of the first latitude o- width modulator, is formed by the combined input of the first respectively fourth, the third input of the second, the third input of the third logic elements 2I-2or-NO and Table  - The decomposition of the vector P in the vectors i, g the input of the second logic inverter, the third input of the phase voltage conversion unit connected to the third output to the sign register is formed by the combined third input of the first logic element 2I-2I-NOT and the input of the fourth logic inverter, the fourth input of the phase voltage conversion unit connected to the second output the sign register is formed by the combined input of the first logic inverter and the fourth input of the second logic element 2I-2ILI-NOT, the fifth input of the phase conversion unit voltages connected to the first output of the sign register are formed by the combined input of the third logic inverter and the fourth input of the third logic element 2I-2ShSh-NOT, the first input of the first logic element 2I-2ShSh- is NOT connected to the output of the first logical inverter logic inverter connected the combined, respectively, the second input of the first, the first input of the second and the first input of the third logic elements 2И-2НЛИ-НЕ, to the outputs of the third and fourth logical inverters The second inputs of the second and third logic elements 2I-2, OR are connected, respectively, to the outputs of the three logic elements 2I-2ShSh-NOT, respectively, the second inputs of the three logic elements 2I are connected. Truth Table of FPPH 14 ± eyz LL OGV Table FIG. 2 Fig.Z i PPP.PDPPGPPPPGT1G1PPPP allpng sapp PPPGSh1GShPL P L / 3 allpng ppppppptgppppshsh ppp pppppg ZHI3 l 5I / 3 f FIG L