SU1580260A1 - Strain bridge signal-to-time interval converter - Google Patents

Abstract

The invention relates to electrical measuring technology and can be used to measure deformation using strain gages. The purpose of the invention, to increase the sensitivity and accuracy of the conversion, is achieved by increasing the number of working arms of the strain gauge and automatically compensating for the initial imbalance. To do this, two working arms of the strain gauge were inserted into the converter, a second discharge resistor connecting the third inputs of switches to a common bus, an additional operational amplifier whose non-inverting input is connected to the second output of the tension bridge, a resistive divider whose input is connected to a constant voltage source and the output is to the non-inverting input of the compensating operational amplifier, the key connecting the output of the said additional operational amplifier with the output of the divider, and the control unit having two stroke, the first of which is connected to the output of a constant voltage source, and the second - to the output of the comparator, and seven outputs, the first of which is connected to balance the zero of the additional operational amplifier, the second, third and fourth are connected to the control inputs of the switches, This output is connected to the control input of the key, and the sixth and seventh outputs are the outputs of the converter. The enhancements introduced preserve insensitivity to changes in the supply voltage and residual parameters of the switch keys. 1 hp f-ly, 1 ill.

Description

This invention relates to electrical measuring technology and can be used to measure strain using strain gages.

The aim of the invention is to increase the sensitivity and accuracy of the conversion by increasing the number

working shoulders of the tensomebridge and automatic compensation of the initial unbalance.

The drawing shows the functional diagram of the Converter.

The converter contains a source of constant voltage .1, the poles of which are connected to resistive divider 2 and strain gauge 3, and through the discharge resistors 4-1 and 4-2 and through measuring switch 5 and feedback switch 6 to the inputs of the compensator. operational amplifier 7 and integrator 8, the output and input of which are respectively connected to the inputs of comparator 9, the output of additional operational amplifier 10 is connected via switch 11 to the output of resistive divider 2 and the non-inverse input of amplifier 7, the first input of control unit 1.2 It is connected to the second power supply terminal of the tension bridge 3, the second input is connected to the output of the comparator 9, the first output of the unit 12 is connected to the control input of the amplifier 10, the second, third and fourth to the switches 5 and 6, the fifth to the switch 11, the sixth is sign, seventh - informational.

The control unit 12 in turn contains a reset and clocking element 13 with a key 14, an inverter 15, elements AND 16-19, an element OR 20, triggers 21-23, one-shot 24-25, a sequential approximation register 26, and a digital-to-analog converter (PAP ) 27.

The Converter operates as follows.

In the initial state, the key 14 is open. Element 13 generates a reset signal at one of its outputs, which is fed to the corresponding input of register 26 and to one of the inputs of the element OR 20, causing the D-flip-flop 22 to reset to zero. In this case, in register 26, a combination 011 ... 1 is set, which is converted by means of the digital signature module 27 to an equivalent voltage of a certain size and polarity, which then enters the zero balancing circuit of operational amplifier 10. The zero signal from another output of element 13 is inverted by inverter 15 resets the flip-flop 21 to zero while closed with one key in switches 5 and 6, and the integrator capacitor is charged to its maximum voltage value. If the polarity of this voltage is such as shown in the drawing, this means that the lower switches of the switches are closed and the output of the comparator 9 is a zero level signal,

With the closure of the key 14, the direct operation of the converter begins. Element 13 removes the reset signal at its first output, and at the second it generates a Start signal, the appearance of which closes key 11 and a one-shot 25 triggered, which reacts to any change in the state of its input. The impulse from the one-shot output comes to the counting input D-flip-flop 23 and sets it to the state determined by the signal from comparator 9, i.e. to zero. This closes the top switches of the switches and the integrator capacitor begins to discharge. The readiness of the integrator for the first integration cycle is recorded by the comparator, the signal 1 from the output of which triggers the single vibrator 24, which also responds to any change in the state of its input. The impulse from the one-shot output is fed to the input of element AND 16, the second input of which already has a signal from the output of element 13. And element 16 triggers and triggers trigger 21. In this case, the upper switches of the switches open, and the middle ones close and start the first integration cycle, the duration of which counted by element 13 since the installation of the flip-flop 21 in one state.

At the non-inverting input of the operational amplifier (OA) 7, the voltage UAtUK is fixed, where silt is the output voltage of the left arm of the strain gauge; Uc is the compensation voltage. The same voltage is fixed at the output of the right arm of the tensome bridge. The current flowing through the capacitor of the integrator

Tt. -i-tt Tt

(one)

 UA ± UK-Un

I, -,

K8YKH

m

where I is the current of the first integration cycle;

Un is the output voltage of the unloaded right shoulder of the tensome bridge;

R VB (X - output resistance of the right shoulder of the strain gauge. Considering that

UA-Un Ј0En; and R6b, x R0 / 2, where E p is the supply voltage of the strain gauge;

Ј0 is the relative value of the initial unbalance of the tensome bridge;

5158P26P

- the total transfer coefficient of the DAC and the balancing circuit zero of the OS; resistance strain gauge,

we have

2EnieftiK)

 R,

26P

the conversion cycle, D-flip-flop 22 will be set to 1, and after the comparator triggered it will be reset, forming the output value of the converter in the form of a time interval

ten

After the end of the predetermined time of the first integration cycle, the Start signal at the output of element 13 becomes equal to zero. The single-vibrator 25 is activated and the comparator 9 is set again in the D-flip-flop 23. At the same time, the flip-flop 21 is reset and the key 11 is opened. In the switches, the corresponding bit switches are closed and the integrator capacitor begins to discharge with current

20

t JJS- Li 2Rp

(3)

where R p is the resistance of the discharge resistor 4.

The moment of the end of the discharge is fixed by the comparator 9. In this case, the one-shot 24 is triggered, the pulse from its output through the element 17 acts on the counting input of the register. The direct output state of the D-flip-flop 23, connected to the information input of the register, is entered into the last one and at the output of the register appears the combination Q011 ... 1, where Q is the output state of the named flip-flop.

Then, the element 13 again generates the Start signal and the entire described process is repeated in the same way until the compensation is completed. The completion of compensation is possible under the condition that the compensating voltage U k enters into formula (1) with the plus nptt sign, the maximum register code and the minus sign at the minimum, and its maximum value is not less than the initial unbalance of the strain gauge. This condition is dictated by the need to ensure the correct entry of information into the register and is easily accomplished by an experienced selection of the transfer coefficients of the DAC and the zero balancing circuit of the operational amplifier Y.

Upon completion of the compensation process, the device is ready for measurement, as evidenced by the signal of the end of the register conversion arriving at the D input of the trigger 22. In this case, after the disappearance of the Start signal in each

ten

- - 20

25

thirty

35

50

lill- -E-i: R,

(four)

(5J

J-2 about

where T is the duration of the first measure

integration;

Ј is the relative value of the current unbalance of the tensome bridge. Taking into account the fact that after the completion of the compensation K Ј0 with a given degree of accuracy determined by the DAC resolution, the device conversion formula will take the final form

t .lll tz. .

The second output of the converter connected to the direct output of the D-flip-flop 23 at this time contains information on the sign of the measured value.

From the conversion formula (.5), it can be seen that, compared with the known device, the sensitivity of the converter increases by increasing the number of working arms of the strain gauge while maintaining insensitivity to variations in the supply voltage and residual parameters of the switch keys. At the same time, due to the automatic compensation of the imbalance, which is also independent of the change in the supply voltage, it increases the initial conversion accuracy.

Claims (2)

1. The signal converter of the bridge bridge in the time interval, containing a constant voltage source, the terminals of which are connected respectively to the power terminals of the double-arm strain gauge, the first clamp of which is connected to the common bus of the converter, the measuring switch, the first input of which is connected to the second power terminal of the strain gauge, and the second with the first output of the strain gauge, the current integrator, the inverting input of which is connected to the switch output, a comparator connected between the output and the input Ator, feedback switch 55 compensating operational amplifier, the signal and right inputs of which are combined with the corresponding inputs of the measuring switch, compensating operational amplifier, the inverting input of which is connected to the output of the feedback commutator, and the output to the non-inverting input of the integrator, the control unit, characterized in that In order to increase the sensitivity and accuracy of the conversion, two resistor arms forming the second output of the strain gauge, a second discharge resistor, an additional operand an ion amplifier, a resistive divider switch, whose inputs are connected to the corresponding terminals of a constant voltage source, and an output to a non-inverting input of a compensating operational amplifier, to an inverting input of an additional amplifier, and through a switch to an output of an additional amplifier whose non-inverting input is connected to the second output a strain gauge bridge, with the first output of the second discharge resistor connected to the common bus, and the second to the third inputs of both switches, the first input of the control unit is connected the second power terminal of the strain gauge; the second input — with the comparator output; the first output — with the balancing circuit zero of the additional operational amplifier; the second third and fourth outputs are connected to the control inputs of the switch, the fifth output is connected to the control input of the key, and the sixth and the seventh outputs are transducer outputs. 2. The converter according to claim 1, characterized in that the control unit contains a reset element key clocking, one pin is costly connected to a common bus, two triggers, four AND elements, an OR element, two one-vibrators, an inverter, a rigger, a serial register and a digital-analog converter connected to the register output, the output and the second input of which are the first the output and the first input of the block, respectively, the second input of which is connected to the input of the first one-shot and information input of the first D-flip-flop, the counting input of which is connected to the output of the second one-shot, and both outputs are separately connected With the first inputs of the first and second elements And, the second inputs of which are combined and connected to the inverse output of the trigger, and the outputs are the second and third outputs of the block, the fourth output of which is connected to the forward output of the trigger and the input of the reset and clocking element, the first output which is connected to the reset input of the register and the first input of the OR element, and the second - to the input of the inverter, the second one-oscillator, the first input of the third AND element and the feed output of the block, the sixth output of which is connected to the direct output of the first D-tr and with the information input of the register, the output of the conversion end of which is connected to the information input of the second D-flip-flop, the counting input of which is connected to the output of the inverter combined with the first input of the fourth And element with the R-input of the flip-flop, and the output The third and fourth elements of the AND and the OR element are combined and connected to the output of the first one-shot, and their outputs are connected to the S-input of the trigger, to the counting input of the register and to the R-input of the second D-flip-flop, respectively. U