SU1578718A1 - Device for controlling exchange in local network - Google Patents

Abstract

The invention relates to computing. The aim of the invention is to increase the capacity of the device. The goal is achieved by the fact that each of the devices of the computer network maintains a queue to gain access to the physical communication line, and only included devices are counted in the queue. The device introduces a means of forming a queue when the network devices are turned on and off, and also uses the procedure for eliminating collisions in the communication line that are possible when the devices are turned on. The device contains a clock pulse generator, a series-parallel and parallel-series converter, a storage unit, two timers, a firmware control unit, four counters. 10 il.

Description

The invention relates to computing and can be used in computer networks, data networks, teleprocessing systems.

The aim of the invention is to increase the capacity of the device.

Fig „1 shows the functional diagram of the device; FIG. 02 is a series-parallel and parallel-eating device circuit; Fig 3 is a diagram of the third counter; FIG. 4 is a block diagram (firmware control; FIG. 05 is a diagram of a computer network; FIG. 6 is a timing diagram of the operation of the computer network; FIG. 07-10 is an algorithm of operation of the program control block.

The device (Fig. 01) contains a clock pulse generator 1, a series-parallel and parallel-serial converter 2, storage unit 3, second timer 4, microprogram control unit 5, first timer 6, first 7, second 8, third 9, fourth 10 counters. In addition, the device contains input 11 Synchronization of received data, RC, input 12 Transmission data request TS, output 13 Data transfer notification TD, input 14 Notification of reception of data HF, input 15 Notification of the presence of a CRS carrier, input 16 Notification of signal distortion CDT, output 17 Request output TEN, output 18 Transfer resolution.

Series-parallel and parallel-serial conversion

one

00

(yo &

QO

The recipient (Fig. 02) contains two n-bit shift registers 19, 20, respectively, for receiving and transmitting communications.

Storage unit 3 contains three n-bit permanent memory devices (ROM). The selection of one of the three ROMs and connection of its outputs to the outputs of storage unit 3 is carried out using the group of address inputs of the storage unit. N - number (highest) bits in the control message of the first, second or third type

The third counter (FIG. 03) contains a switch 21, a three-input element OR 22, a binary counter 23, a decoder 24 zero.

Firmware control unit 5 (Fig. 4) is a control machine with rigid logic, i.e., a logic circuit generating time-controlled control actions to the device units.,

Block 5 contains the first 25, second

26 and third comparing circuit 27, address sampling unit 28, microcommand, microcommand address register 29 block

30 fixed memory, random time interval generator 31 Block 5 operates in accordance with the microprogram frame recorded in the fixed memory block 30, according to the clock signals of the pulse generator (not shown). Signal processing from the device blocks is performed by block 28 26 the comparison generates a signal if the serial-parallel and parallel-serial code of the recipient's address arriving from the converter 2 is broadcast. The first comparison circuit 25 generates signals if Atel 2 message type code coincides with the control message code of the first, second, or third type. The operation of the first comparison circuit 25 is allowed if the output of the second comparison circuit 26 is set. Third scheme

Comparison produces a signal, if coming from the converter

2, the device address code - the sender of the message is less than the individual address of this device. The operation of the third comparison circuit 27 is permitted if the first comparison circuit 25 detects the code of one of the second or third type control messages, Formiro

five

0 5

0 0 § d

with

five

The transmission and feed to the inputs of the comparison circuits of the reference address codes and message types are not shown.

Unit 5 operates in accordance with the algorithm shown in Fig. 47 10 "

The computing network is represented by FIG 5: communication line 32, exchange control device 33; The physical layer block 34 is subscriber 35, station 36, N is the number of stations.

The physical layer block 34 provides an interface (signals 11-17) in accordance with ECMA 810 standard. The physical layer block can be implemented on a large Intel Integrated Circuit (LSI) Intel 82501, which provides a standard interface, as well as a sync signal for received data.

On fig.b presents a temporary diagram of the network of four stations. The following notation is used in the diagram: At - link access resolution interval; TJ is the response time of the first timer; T2 is the response time of the second timer; TUS is the time of transmission of the second type of control message; T to is the time of termination of the transmission by stations participating in the conflict after they have detected a conflict; Tsd - random time interval; UprS1, UprS2, UprSZ - control messages of the first, second and third types respectively; InfS - informational message ,, Numbers indicate the states of the third device counters at various times temporarily

The computing network works as follows0

Station 36 (respectively, device 33) may be in one of two states: on (active) or off (passive).

Off state is equivalent to station power off.

The stations 36 in the active state exchange messages with each other, which are transmitted over the communication line, one by one, bit by bit. To send a message, the device 33 allows the subscriber 35 to access the communication line, and the access times are shifted for different stations by At. produced by devices 33, starting from the time t0 nepexo.r and the communication lines to a logical state

Free, i.e. alarm reset 15 Carrier availability notification. Each of the devices 33 maintains a queue to receive the corresponding access station, and only the active stations are counted in the queue.

Let out of the total number of N stations in the network N) stations are in the active state, N 2 in the passive state:

N N 1 + N 2

In the active state, the station may transmit control messages of the first, second, or third type, as well as information messages. Each message must have a field containing the address of the station - the recipient of the message, the address of the station - the sender of the message, a field indicating the type of message. For example, in a message, the 1st byte is the address of the receiving station, the 2nd byte is the address of the sending station, the 3rd byte is the message type field; 4th, 5th. ,,. data bytes.

Each station must have an individual address and receive messages that are addressed only to that station. The zero address of a station in the network is prohibited. A broadcast address must also be defined. A message containing, for example, all units in the address field of the recipient station, must be received by all stations. The station address is the same as the device address. The control messages of the first, second and third types must be broadcast out, and all stations must receive these messages at the same time, sent by one station.

The units of the device (FIG. 1) perform the following functions.

The converter 2 receives from the physical layer block 34 n bits of all messages transmitted over the communication line, converts the message into a parallel code and issues a message to CU 5 for processing. A node counting the number of received bits and limiting reception to converter 2 of more than bits of one message is not shown in Figure 2. The shift of the 14 bits arriving at the input of the message received to the converter 2 is carried out by the sync pulses received by the input 11.

five

0

five

0

five

0

five

0

five

When issuing a message to the physical level unit 34, unit 5 gates writing to the converter 2 messages arriving from the storage unit 3 and sets the signal 17.

Converter 2 on clock pulses 12 outputs the message bits to output 1 Per

The storage unit 3 stores the bark of control messages of the first, second and third types

The second timer 4 after the start produces an impulse of duration T1. The timer is triggered by the input signal, as well as when the power is turned on (the circuit in FIG. 1 is not shown)

The first timer 6 generates a pulse through time T2 after start. Timer 6 is triggered by the Rear Signal Front. 15 Carrier notification. The rising edge of signal 15, the first timer 6 is reset. Resetting the timer means that it stops counting the T2 interval to generate a pulse.

The value of the first counter 7 at the moment of pulse reset at the output of the second timer 4 is equal to N1-1. The value of the second counter 8 is equal to N1-1 during the whole time of the active state of the device

The value of the fourth counter 10 is N 3, where N 3 is the number of active stations in the network whose own individual address is less than the address of this station. The zero state of the third counter 9 means that the given station is accessing the communication line. On the zero state of the third counter 9, the control unit 5 generates one of the signals 17 1 or 18,

Counters 7 through 10 are triggered when the power is turned on (the reset circuit is not shown in the diagram).

Control unit 5 on the trailing edge of a signal 15 Carrier presence notification analyzes the address codes received from converter 2 by the station receiving and sending the message, such as a message. If the code of the receiving station is broadcast and if the message type code is equal to one of the control codes of the first, second or third type, block 5 generates control actions to the device blocks. In addition, block 5 generates appropriate control actions when the signal 16 is set, as well as the signal at the output of the second timer 4,

The device can operate in one of three modes:

10 Transition to active state.

2, Active operation.

3. Transition to the passive state. The transition of the device to the active state is carried out as follows:

When the power is turned on, counters 7-10 are reset, a signal is set at the output of the second timer 40. The device is waiting for a message to be received. If the device has received a control message of the first type when the signal at the output of timer 4 is set, block 5 restarts the second timer 40 If the control message of the first type was not received, timer 4 resets the signal after time T10 Block 5 returns the address to block 3 the first type of control message, gates the recording of this message to converter 2 and, if signal 15 is cleared, outputs signal 17, initiating the transfer of the first type of control message to the physical layer block and then to the communication line (time t f ig.6, blocks 37-44 algorithm), i.e. The device waits for time 11 before transmitting the control message of the first type. This is necessary in order to prevent incorrect formation of communication access queues in devices when two or more devices simultaneously move from a passive state to an active one.

Node tracking the number of transmitted bits and initiating a reset of the signal 17, t, e0 transmission end} in Fig „4 not shown

Upon completion of the transmission of the first type of control message, block 5 starts timer 4 (block 53 of the algorithm), which sets a signal of duration T1. During this T1, the device only receives messages. T1 duration must be

R

 (- | - + ut),

where B is the number of bits in the type 2 control message;

F - data transmission rate over the communication line, bps

N is the total number of devices in the network; At - the interval between the moments

providing access to two adjacent devices in the queue in the absence of transmissions in the communication line.

All active devices in the network at time T1 transmit a type 2 control message once (moments t2, tj, t. In FIG. 6). The converter 2 receives the message bits. The control unit 5, after resetting the signal 15, analyzes the address fields of the receiving station and the sender, such as a message, and generates signals that increase by 1 the values of the first counter 71 and the fourth counter 10 if the address of the sending station is less than its own individual address of this device This process is repeated during the period T1 each time this device receives a second type of control message

Active devices during period T1 operate as follows (blocks 81-93 of the algorithm)

The transducer 2 of the active device receives from the device transitioning to the active state the bits of the control message of the first type. Block 5, after resetting the signal, analyzes the message type field, starts the second timer, and resets the first 7 and fourth 10 counters. Next, block 5 generates the storage address of the second type control message to storage block 3, gates writing the code of this message to converter 2, and if a signal is set at the output of the third counter 9 and the signal 15 is reset, sets signal 17 to initiate transmission of the message to the communication line . At the end of the transmission, the device waits to receive until the end of period T1. If, during period XI, the device receives a second type of control message from another active device. Unit 5 forms the first 7 and fourth 10 counters in the same way as the control unit of the device, which switches to the active state I

So at the end of the period

T1 (moment tg) in the network becomes

N1 + 1 active devices, 1st counters 7 in each device have a value of N1, 4th counters 10 have a value of 3, equal to the number of active devices having an individual address less than the address of this device, that is, the value of four counters in different devices are different0

At time t. resetting the timer 4 signal in all active devices the following occurs. The information from the output of the fourth counter 10 is fed to the first information input of the third counter 9 and is recorded in it by the falling edge of the output of the second timer. By the same signal, information from the output of the first counter 7 is recorded in the second counter 8 "

The device operates in active mode as follows. At the first control input of the third counter 9, when there are no transmissions in the communication line, the clock receives pulses from a quartz-stabilized generator of 1 clock pulses, reducing them by. 1 contents of the 3rd counter 9 "When the 3rd state of the 3rd counter 9 is zero, block 5 sets the signal to 18 Transmission permission, allowing the subscriber 35 access to the communication line0. The subscriber, if he has a message, starts to send it to the communication line. A signal 15 is established for all devices, prohibiting the clock pulse generator 1 from generating pulses. After the transfer of all devices in the GTI communication line 1 begins, the periods At start from the tQO moments. Thus, the GTI mismatch arises due to their instability during pauses in the transmissions. Signal at the output of the third counter 9, if it is reset , set during the time DC0 When this signal is reset, information from the output of the 2nd counter 8 sinks to the second information input of the 3rd counter 9 and is written to it, i.e. in the station accessing the communication line, the maximum queue is set to receive the next access.

The values of the three counters 9 in each network device are different, and in: each moment of time only one

The station can access the link.

For reliable conflict-free transmission, the At period must be

R

+ tnpA. +

G-tnp9 bt + t,

five

where L is the length of the communication line;

V is the propagation speed

p rsignal through the communication line, m / s;

tnpj (Ј „0 the time of the buildup of block schemes

l

the physical layer during transmission and reception, respectively;

v is the time compensating for the divergence of the GTI in different devices.

In order to compensate for the discrepancy between the clock generators during long pauses in the transmissions, all devices read the interval.

time T2 from the end of the last transmission in the communication line.

T2

e

0 where j is the relative error

clock generators.

At the time of termination of T2, the divergence of the generator 1 clock pulses in

5 devices are not enough for

simultaneously providing access to a communication link to two or more stations. A device that accessed the communication line immediately after

The 0 end of T2 sends a type 2 control message (time t7). After the transfer of the GTI 1 of all devices of the network begins, the intervals Dt t start from the moments t0, to compensate for the discrepancy. The intervals T2 are counted by timer 6, which is reset by the trailing edge and triggered by the rising edge of signal 15.

For correct interpretation

0 type 2 control message devices

T2 t T1.

The value of t that optimizes access delays in the transmission of information messages by the station is calculated by the formula

f with / -

Ј f

where t

the transmission time of the second type of control message over the communication link;

one

At1

f - -,

message connection (time tg). Upon completion of the message transmission, block 5 generates a signal (not shown) allowing the device to power off. The control unit 5 of the device 33, which has received the control — Third type message, generates signals that decrease the second counter value by 8, sec. a, also the fourth counter 10, if. the individual address of the device — the sender of the third-type control message — is less than the address of the recipient device. By a signal decrementing the value of the second counter 8, the information from the output of the fourth counter 10 is recorded in the third count.

nominal frequency of clock generators, calculated without taking into account the time of compensation for GTI divergence

After the T2 interval expires, the first timer b generates a pulse. If the state of the third counter 9, the null block 5 sets to the storage block 3 the address of the control message of the second type and gates it to the converter 2, sets the signal 17, initiating transmission of the message to the communication line ( time tr), the GTI 1 of all devices compensates for the discrepancy during the set signal 15. The control unit 5 does not generate the corresponding counter modification signals if control message 1 of the second type was not received a time period T1, t "e" at the output of a reset timer 4 (blocks 71 - 80 of the algorithm).

The transition of the device to the passive state is carried out as follows (blocks 94 - 102 of the algorithm). On the power off signal ((not shown in the diagram), block 5 generates the storage address of the control message of the third type into storage block 3 and gates recording it to converter 2, waits for the third counter 9 to zero, then sets the signal 17, initiating transmission to

five

9, i.e., in each of the devices 33 of the network, a different value of the queue for accessing the communication line will be established without taking into account this device, which has passed into the passive state. The transition of the device to the passive state can be effected by the signal of the subscriber. The transition to the passive state (not shown) is carried out.

An emergency shutdown of the power supply of a device may result in a third type control message not being transmitted to the communication line. In this case, the device will be counted in queues to gain access in all other active devices on the network until one of the passive devices switches to active mode.

When the network is operating in the communication line, a conflict is possible in the following cases: two or more devices simultaneously (with an accuracy of the signal propagation time on the communication line) began the transition to the active state; device transition

to the active state, the beginning of the transmission of the control message of the first type simultaneously with the beginning of the transfer of the information message to the other station

Thus, in the event of a conflict, at least one station transmitting a control message of the first type participates in it.

The conflict is resolved in accordance with the algorithm (blocks 47 - 51, SW, 66 - 70, 75 - 79).

According to the set signal 16, block 5 resets signals 17.18, initiates the end of the message transmission (time t9) and prohibits GTI 1 to generate clock pulses. Signal 15 is set during time T, after reset by control unit signals 17, 18. During time T " other stations - participants of the conflict stop transmitting. After the signal 15 is reset, the control unit 5 selects and writes to the converter 2 that message with the transmission of which the conflict occurred, and later the case

The time the TCA sets the signal 17, initiating the transmission of the message.

The TSL is uniformly distributed in the range of 50–200 ms.

1315

Block 5 of the device that did not participate in the conflict, after resetting signals 15 and 16, prohibits operation of the GTI 1. Any transmission on the communication line causes a signal 15 to be set, according to which unit 5 removes a signal to the generator in all devices that prohibits the generation of clock pulses. Further, the device operates as described for the active mode, allowing the subscriber access to the communication line (by setting signal 18) at the zero state of the third counter 9,

Claims (1)

Invention Formula An exchange control device in a local network containing a serial-parallel and a parallel-serial converter, The clock pulse generator, the first, second and third counters, accept the output of the first counter connected to the information input of the second counter, the output of which is connected to the first information input of the third counter, characterized in that, in order to increase the capacity of the device, the first and second timers, the storage unit, the firmware control unit, the fourth counter, the output of the storage unit connected to the first information input of the serial-parallel and parallel-serial converter, the second information input of which is the device input for connecting to the local network bus. the clock trigger input is connected to the input of the device for connecting to the bus / Notification of the presence of a local network carrier and is connected to the input the resolution of the count, the second timer and the first input of the transition condition of the firmware control unit, the second input of the transition condition of which is the input, of the device to be connected to the bus. Notification of the distortion of the local network signal, the data input of the microprogram control unit is connected with the first information output of the trace-key pairs of the allelic and parallel-serial converter, the second information output of which is 18 14 g five 0 50 five . , device bus connection Notification of the data transfer of the local network, the first and second synchronization inputs of the serial-parallel and parallel-serial converter being the device inputs for connecting the buses synchronizing the received data and requesting the transmitted data of the local network, the first output of the firmware control unit connected to the address input of the storage unit, the second output of the firmware control unit is connected to the write enable input of the sequence On the parallel-parallel and parallel-serial converter, the third output of the microprogram control unit is connected to the second input of the start of the clock generator, the output of which is connected to the subtractive input of the third counter, the fourth and fifth outputs of the microprogrammed control unit are connected respectively to the summing and subtracting inputs of the fourth counter, the output of which is connected to the second information input of the third counter, the first input of which is connected to the subtractive input of the second counter Ik and the sixth output of the microprogram control unit, the first input-logical condition of which is connected to the output of the third counter and the second write input of the third counter, the output of the first timer is connected to the second input of the logic condition of the microprogram control unit, the seventh output of which is connected to the summing input of the first counter, input the reset of which is connected to the reset inputs of the fourth counter, the second timer and the eighth output of the firmware control block, the output of the second timer is connected to the third in the logical condition of the firmware control block, the recording input of the second counter and the third recording input of the third counter, the ninth output of the microprogramming control unit is the output of the device for connecting to the mine, the output of the local network, and the tenth output of the firmware control unit The output of the device is to connect to the subscriber input. Transmission enable. 3 P 25 / 5 16 U U, TOTA3 9 77 7G; Ptf. Ot40t60 / p9 / jf yj / y | X GP 29 J / and Jj 7 t Г I35 n 13 % 15 sixteen P J2 Pini connection Sh 5 6 15 L signal installed Signal 15 cleared J Comparison Resolution recipient j addresses Controller I message of the first type First timer reset Issuing the sampling address of the control message first / linux Testing the T record 8ppt messages Signal output P J Transfer complete Signal 16 is set J Ob Signals 15.16 Reset J Run generator 1 at random time intervalsJ The controlling cootft first type j Random Interval Generator Fired From the beginning) Prohibition ban signal reset 17 FIG. 7 Reset signal P, start the first timer J Received control 1 message of the second munaj Increment of the first counter one The sender address is less recipient j addresses Increment fourth counterJ First timer reset The third counter / ug zeroedJv Reset 18 J signal: Control of the third type is received. Decrement of the second counter The address of the sender is less than the address of the recipient The decrement of the fourth counter. Records information of the second counter in the third Stop signal 18  Signal 16 set   4 Prohibition of the GTI, G icBpoc signal 1B J Signals 15.16 L cleared fff {Signal 15 is set  Resolution robots Second timer | - worked J The third counter is zeroJ- Sampling of the control message of the second type, strobirovanie records in / 7/7/7, set the signal Signal 16 set Work ban 1 U reset signal P Signals 15; 16 reset Signal 15 1 / set J Permission to work GTI The third counter is zero D- Setting the signal P J Transfer stalled Reset signal P I f First Timer reset 1; Control Report - Second type issued by J Not  Transfer complete  C6poc SignalP  Receive control message first. like Starting the timer A sample of the old type control message and its 8 LLL recording. Controller | second message second type Increment of the first counterJ The sender address is T  -J less address is floor and body Chetberto increment. th accountant Power off Supervisor Vyvopka Prin then ul- | Up to a ktszee message -. first type j Signal Setup 11 16 T signal installed Reset signal / 7 J- Power down FIG. Yu Third counter zero battle , Lorea Complete (Sucker)