SU1561097A1 - Multicomparator device for processing signals for reproduction of binary information - Google Patents

Abstract

The multi-processing signal processing device for reproducing binary information comprises a storage of 1 elementary elements consisting of a control unit 3, N comparators 4.1-4N, a source 5 of reference elements, and a read-only memory. Depending on the levels of the selected values of the reference voltages at the output of the device, one of the signals may appear: 1.0 or C.

Description

I

(L

with

SP

about

0

-four

The invention relates to computer technology and communication technology and can be used in high-speed playback devices, binary information, for example, from optical disk media, as well as in high-speed digital information transfer systems to increase the reliability of reading or JQ receiving digital messages.

The purpose of the invention is to increase the reliability of reproduction of inspiration.

The drawing shows the structure of an electrical circuit of a multi-device signal processing device for reproducing binary information.

The device contains a storage unit 1 20 of elementary elements and a permanent storage device (ROM) 2, a drive unit 1 of elementary elements form the control unit 3, n comparators 4.1-4.

The device works as follows.

The If / 30 binary information reproduced from the carrier and amplified is fed to the first inputs of all n comparators 4.1–4.p. Voltages are supplied to the second inputs of the comparators from the outputs of the source 5 of the reference voltages, which set the thresholds for the operation of the comparators.

. The control unit 3 receives the control signal, which is a clock signal, set at 35

recording clock and readout

Vania information from the carrier. During a single interval T, equal to the duration of a single element, the outputs from the 1st to the nth control unit 3 are sequentially timed with an interval of T / n pulses 9 are generated which sequentially arrive at the control inputs of the comparators, fixing their state at time points tt i T / n, where i 1, p, B depending on the ratio between the input and reference voltages at the outputs of the comparators are fixed elementary elements, which are stored in d

0

five

0

with

0

In the case of a register 6, a single unit of the interval T in register 6 accumulates n elementary elements, forming a unitary code that is fed to the address inputs of ROM 2.

At the end of the unit interval T, with some delay, a signal is produced at the n + 1-m output of control unit 3, which is fed to the control input of ROM 2 and enables reading of information. Depending on the value of the unitary code, the address inputs at the corresponding information output (0.1 or C) of ROM 2 generate a single signal corresponding to the reproduced binary information (output 0 or 1) or erase signal (output C).

Claims (2)

1. Multiparator signal processing device for reproducing binary information containing a storage unit of elementary elements, characterized in that, in order to increase the reliability of reproduction of information, a permanent storage device is inserted into it, the control and address inputs of which are connected respectively to the control and information outputs the elementary element storage, and its three information outputs are the outputs for reproducing binary information and the erase signal. 2. The device according to claim I, characterized in that the elementary element storage device contains n comparators, a control unit for a permanent storage device and comparators, a source of n reference voltages, the outputs of which are connected with the first inputs of n comparators, the second inputs of which are combined and connected to the information input of the device and the register, n inputs of which are connected to the outputs of the comparators, and n outputs to the address inputs of the persistent storage device, while the control input of the device is the input of the control unit .