SU1552381A1 - Device for correction of mistakes - Google Patents

Abstract

The purpose of the invention is to increase the reliability of the device. The device contains a storage unit, a buffer drive, a generator of syndromes, a drive of syndromes, an error decoder and a block of adders modulo two. The OR elements and the key block are entered into the device, the fourth — the sixth code converters, the third memory block, the first and second triggers, the second AND element and the second decoder are entered into the locator calculator and error values.

Description

The module is connected to the zero potential bus, the first input of the first modulo two groups and the output of all adders modulo two groups, the output -1 of the ring shift register and the third code converter are connected to the third and fourth information inputs of the second multiplexer, respectively. —Lyauyugtsees by the fact that, in order to increase the reliability of the device, OR elements and a key block are entered into it, the fourth to sixth Kotz converters, the third memory block, the first and the second triggers, the second element And and the second decoder, the inputs of which and the first inputs of the ring shift register

combined and connected to the outputs of the group triggers, the output of the first decoder is connected to the first input of the second element, the output of which is connected to the installation input of the counter, the output of the second decoder is connected to the S input of the second trigger, the forward output of which is connected to the second input of the second element And, the input zeroing the counter and R-inputs

the first r of the second flip-flops are combined and connected to the Reset device input, the inputs of the fourth, fifth and sixth code converters are connected to the outputs of the first and second memory blocks and the counter, respectively, the four code converter inputs are connected to the first input of the first and second the inputs of all modulo adders

groups and the fourth information inputs of the first multiplexer, the outputs of the third memory block and the fifth code converter are connected to the fifth information inputs of the first and second multiplexers, respectively, output: one of the first flip-flop is connected to the second input of the first element I, the first outputs of the sixth converter the code is connected to the second inputs of the ring shift register the second outputs of the sixth code converter are connected to the second control inputs of the calculator of elementary symmetric functions that control the the course of which is connected to the S-input of the first trigger of the locator calculator and error values, the first and second information outputs of the calculator Elementary symmetric functions are connected to the information inputs of the first and second multiplexers, the locator calculator and error values, the third output of the first locator code converter of locators and values, respectively error and the second output of the error decoder are connected to the inputs of the OR element, the output of which is connected to the control input of the key block, the second control is yuschemu entry buffer accumulator and is a control output of the apparatus, the block key data inputs connected to the outputs of the adders modulo DVD unit, outputs a key block are respective data outputs; otroyst- va.

The invention relates to computing and can be used i; information storage, transmission and processing systems

The purpose of the invention is to increase the reliability and decoding.

Fig. 1 shows a block diagram of a device for correcting errors; Fig 2 shows a functional diagram of the locator and error values.

The device for error correction contains a storage unit 1, buffer pump 2, block 3 adders

modulo two, generator 4 syndromes, accumulator 5 synchromes, decoder 6 errors, calculator 7 elementary symmetric functions, calculator 8 lockpoints and error values, element OR 9, block 10 keys, informational output. 11 and control output 12.

The calculator 8 locators and error values (figure 2) performed on the first and second triggers 13 and 14, the first and second elements And 15 and 16, the counter 17, the element NOT 18, the first and second multiplexers 19 and 20, peremno5

515523

resident 21, group of triggers 22, per20

second, third memory blocks 23–25, SDRIG ring register 26, first sixth converters, 27-32 codes, adder group 33 modulo two, first and second decoders 34 and 35. In FIG. information inputs 36 and 37, control and clock inputs 38 and 39 ,, input 40 S Reset, control outputs 41, information and control outputs 4 - 44 "The first and second outputs of the first converter of the 27 code contain control circuits (write and readout, 15) and address circuits, since the first and second memory blocks 23 and 24 are operatively storing stroystvam:. Outputs 41 include a read circuit and address circuits.

Converters 27-32 of the code can be performed on permanent storage devices.

Calculator 7 in addition to calculating 25

elementary symmetric functions 6, performed in the same way as in the known device, produces at the address given by the converter 32, the connection to the input of 37 in accordance with the stem of the syndrome of S ,; .

The error correction device operates as follows.

A data block encoded with a correcting (p, K) code is written off from block 1 and written to the buffer storage and generator 4 of syndromes, where the length of the code block in the GF (2) field elements, K is the length of the information part of the block, m is the element width of the field . In generator 4, by dividing the constituent parts of the generating polynomial g (x) (x + 1) (x + 0h) (x + + oi) (x + yx) 4 (x + oi) 5, syndromes are obtained

The Error signal gives the resolution for the operation of the calculator 7, in which the multiplicity of 1 error is determined. If 1 3, then the received information block is not output to the consumer. At 1 Ј 3 n, the calculator 7 will determine the elementary symmetric functions GL by the recurrence relation

- G

+ G i SUE-M + - O.

GЈ-iS1 +,

2s;

The obtained values of G ,, G, G (suppose that three-fold errors have occurred) are supplied to calculator 8, the signal at input 38 resolves the operation of calculator 8.

At the beginning we describe the process and transformations of the received symbols, each of which contains m bits in the Galois field GF (2). All CHMBOTI fields GF (2m) can be represented as powers of the primitive element oЈ. Caps

primitive elements сЈ, of. 1,, ofg,, and t I m-i

"Are linearly independent of the GF (2), then they form a norm basis, In the envelopes of the polivals of the polynomials, burn out a nice nt-member of the corresponding i-ksoei

g

degree whose roots

are independent, where i О, 1,2 ,,. ,, ,, then the ryyn olegel-ft i SG (G 35 knives can be represented as the degree of the element i in the form of pa j-oe by normal 5, zis

m-i

J

: n

oi about

The representation of the elements J as a decomposition in a normal basis is convenient when raising to the power of the form 2

.I- mistakes that are recorded

 5c- and extracting tn-1 root, for example, if the element in f p gL + Jf, oi + J2o / 4,., Squared, then I get

About S j, o o o

Syndrome drive 5 is connected to the output of drive 5, a 6 error decoder is connected, which represents the OR element. If a remainder is obtained during division, then it contains at least one binary 1, then the Shibka signal appears on the first output of the decoder 6 S0 S.oo "Sg3 0, then the No Error signal appears at the second output of the decoder 6, and the code block is read by this signal from buffer storage 2 through the open key block 10 to the consumer

50

I (y0og)

2t 2 + (t,)

q.d) a +

+ At t-2, 2 (wiav +

2 fm

$ g

4) + ... +

J, s /

od

)

55

since .. Thus, squaring means cyclically shifting an element one digit to the right o Similarly, square root means cyclicSignal Error gives resolution for operation of calculator 7, which determines the multiplicity of 1 nsprplchgmich errors If 1 3, then the received block of information no consumer is issued. At 1 Ј 3 n, the calculator 7 will determine the elementary symmetric functions GL by the recurrence relation

+ G i SUE-M + - O.

GЈ-iS1 +,

s;

The obtained values of G ,, G, G (suppose that three-fold errors have occurred) are supplied to calculator 8, the signal at input 38 resolves the operation of calculator 8.

At the beginning we describe the process and transformations of the received symbols, each of which contains m bits in the Galois field GF (2). All CHMBOTI fields GF (2m) can be represented as powers of the primitive element oЈ. Caps

primitive elements сЈ, of. 1,, ofg,, and t I m-i

"Are linearly independent of the GF (2), then they form a norm basis, In the envelopes of the polivals of the polynomials, burn out a nice nt-member of the corresponding i-ksoei

g

degree whose roots

are independent, where i О, 1,2 ,,. ,, ,, then the sequence of riyn is ogel-ft i SG (G nozel can be represented as the degree of element i in the form of pa j-oe ni on a normal 5, zis

m-i

J

: n

oi about

0

I (y0og)

2t 2 + (t,)

q.d) a +

+ At t-2, 2 (wiav +

2 fm

$ g

4) + ... +

J, s /

od

)

five

because .. Thus, squaring means a cyclic shift of an element by one bit to the right o Similarly, a square root means a cyclic shift of the epement by one bit to the left.

The essence of the method and the operation of the device will be considered when correcting three-fold errors, the presence of which is indicated by the calculator 70. To find the error locators x ,, x2, he, it is necessary to solve the cubic equation

G (x) (x + x,) (x + x2) (x + x5) x3 + G, xV °

+ +

3

where С х, + х2 + х3,

G2 x, x2 +, + x2x

2LE1

G x, x2he.

The roots of the he + G, x2 + GЈx + equations are x, x i, and x 3 locators.

By replacing x equation

G i + z coming t

 (C + G2) z + (G3 + G, G2)

The equality G is checked (+ if it is satisfied, the equation

O. (O

About deciding -

z3 G} + G 4 Ga

With an even field, GF (2) contains all the third-degree roots of 1, therefore, it is required to determine only one root zt of the last equation. The remaining roots are equal

 g oi

2. -t / e

oi

2-1 / 5

Substituting them into the equation x Of + z, find x ,, x2 and x; When G, + in the equation (.) Make the substitution z

(2

 AtpCG, GZ) and get the equation

q + (j + k

about

Where

„GJ + GjG2

 Tel TC /

Make two more replacements

 Q +

and oo N. As a result, the equation g + KV 1 0 is obtained, which is reduced to the canonical form by replacing KU ("As a result,

h

If denoted) f finally get

When m even it is required to determine only one root of the last equation, which is equal to

u, (o.jf .. Y + L + ut.,.

y. + y

(five)

where Y, are the bits of the element of the field GF (2m).

According to U, find SA)

The remaining roots, since the GF (2) field contains third-degree roots of one, are equal to

25

W2 U, ot

C0} C02 oi

From the root of CO, 0g, and CO 5, we find the roots of x (x, x, xe) of the original equation

30 (I):

x

03

G4 + (G | + Gfy (with

+ “V)

(6)

35

40

45

50

55

These roots are error locators. So, locators x (, x, and x3 errors are determined in calculator 8, whose operation is considered at m 8. Trigger 13 is triggered by a signal at input 38 in calculator 8, which opens element 15 and clocks from input 39 are sent to counter 17.

The calculation starts when checking the equality G 2. - 0. In the first cycle, the state of the counter 17 goes to converters 28 and 32. The converter 28 connects the first inputs of the multiplier 21 through the multiplexer 19, inputs 36, and to the second inputs through the multiplexer 20 - output of the element NOT 18 ,, Converter 32, through its outputs 4 41, supplies to the calculator 7 the address where the value G is written and its readout signal. As a result, the value G is fed to the first inputs of the multiplier 21, and the second to

9

 I. Therefore, at the output of multiplier 21, the value of Ы is obtained. G ,, - C (which is recorded on the group triggers 22. The triggers 22 operate in the modulo two counting mode, for which the inverse output of each of them is connected to its C input.

From the second cycle, the value of GJ is rewritten from the triggers of the 22 groups to firioK 24 using the write signal h pi to the address specified from the second outputs of the converter 27. On the third cycle, the converter 28 connects through the multiplexer 20 to the second

the inputs of the multiplier 21, the outputs of the block 24, to which the read signal of the converter 27 is simultaneously supplied, and the value C, remains at the first inputs. Converter 32 reads from calculator 7 the value of GJ, which is applied to the first inputs of multiplier 2 i, the inputs of which from block 24 are written to the second value C. The outputs of the multiplier 21 are the product G4 G, G ,, which is written to the triggers 22 groups.

In the fourth cycle, the converter 32 supplies the first inputs of the multiplier 21 values G2, and the converter 2b connects to its second input the value c o The resulting product od n + G2 G2 folds modulo two with the value stored on the triggers 22 groups. As a result, the sum of C + G2 is obtained. On the next cycle {n}, the status of the flip-flops 22 groups with

2

using a decoder 35. If G, +

+ G4 O, the signal from the output of the decoder 35, the trigger 14 is set to one. The contents of the group triggers 22 are recorded using a signal from the first output of the converter 32 to the register 26.

Next, the calculation of G. + G Ges is performed. At the sixth cycle, converter 32 writes the value C f from calculator 7 and delivers it to the first multiplier 21, and converter 28 connects the output of the element HE 18, te 0 great to the second inputs of multiplier 2 rank. At the outputs of the multiplier 21, the value oi G $ G3 is obtained, which in the seventh cycle is rewritten into the block Next in the eighth and

1U

the ninth clock cycle, similarly to the previous one, calculates the value of G9 + Г, Г, which, at the tenth clock cycle, is written into blocks 23 and 24.,

Suppose at the beginning, h-r G + + GЈ40 and it is necessary to set error locators through the equation (3) „The value of G, + G2 was written down. in register 26, it needs a IB ITJ transform, to a value (D-2). On otshn -, at the same time with converting 32 on the second circuit to the corresponding vnu-n, the input input of register 26 is fed to the left shift, as a result of ITQ that in register 26 I get Bfmmniv

f / 2

(G1 + G2). Since this lipr is necessary for further calculation of willows, it must be recorded in 23, Therefore, at the twelfth cycle, the converter 28 connects the first inputs of the HE 18 to the first inputs of multiplier 21 through the multiplexer 19, the outputs 26 of the register. As a result, the triggers 22 groups will be written down the value (Gf + G) which, using a signal from the OUTPUT, transforms ge-t 7.1 on the thirteenth clock cycle, is cleared on Tchgk-33, the operation procedure in the formula (i, and ek lg- on the operation of an adult) / t ocrof vi

rt11 /)

construction (C, "C; /, ku.

REMAINED TELE WITH THE P MOTOR TYPE 29. Value (C - („g, h, written in register ± ti, ,, (a / - res for transform t n 2 °) as a result of which the output.: Psg appears recording t h t h it ich t address size

one

BUT

(G + C,) L

On the fourteenth clock cycle, the outputs of block 23 are connected to the continuous inputs of the multiplier 21, and the pure inputs to the output of the converter 29. The converter 27 reads from block 23 and delivers G-+ to the multiplier 21, and the second inputs of multiplier 21 are supplied with the value A. at the outputs of the multiplier 21, a value K will be obtained, which is written into a group of flip-flops 22 and on the fifteenth clock cycle is rewritten into blocks 23 i-24o

Next you need to get the value of ft 1 / K o On the sixteenth clock cycle

Converter 28 connects to the first and second inputs of multiplier 21, respectively, the outputs of blocks 23 and 24, converter 27 deducts from these blocks the value of K, Thus, at outputs of terminal 21, they receive

l

the value of K, which is written to the group of flip-flops 22 and rewritten in block 23 on the seventeenth clock cycle. In the next eighteenth clock cycle, the converter 28 connects to the first inputs of the multiplier 21 a bus containing 0 through the first circuit, the second output of the converter 30 through the second circuit and output circuits of the group of adders 33 modulo two, and the second inputs - the value of K from block 24 Converter 27 signal with its first output bus writes off and: 4

J

of block 23, the value of K, which is the address for converter 30, by which the value 1 / Kg y is written in it. This quantity, with the exception of the first digit, goes to modulo two group of adders 33, containing t-2 adders, i

As a result, the first entrances of the ne

re multiplier 2i value will be given

U

four

obtained in accordance with formula (5), and the second inputs of block 2 1 is the value of K0. At the outputs of multiplier 21, the value of K U is obtained, which is rewritten at block nineteen cycle B block 240

Next, we get the value of SO, o On the twentieth cycle, the converter 28 connects to the first inputs of the replica of the bodies 21 values of Y. , and on the second EQUIPMENT - the outputs of the converter 3L The Converter, using signals from the second outputs, selects from the block 24 the value K U, which sets the address for

31 transducer

VU Shchina San - KU (00, "As a result, Q is fed to the second amperolizer, and at its outputs the value oi ° CO is obtained, w which is written to the flip-flops 22

eleven

1group

On the twenty-first clock cycle, CO is rewritten into block 23 and the remaining triangles 22 of the group remain on. On the twenty-second clock cycle, the outputs of the transducer are connected to the first inputs of the multiplier 21 and the value od ° is connected to the second inputs. The converter 27 selects from CO 23 the value of CO, which provides the output at the outputs

The developer 30 values 1/60 ,. At the outputs of the multiplier 21, the value 1 / CO, i which is added modulo two to the value G), is recorded, recorded on group triggers 22 The received sum CO, 1 / CA, is written to block 24b on the twenty-third Tc-cte

Locator x, errors are obtained by calculating using the formula (.6), the value

2.1 / 2

/ C, + G4) is stored in block 230

At the twenty-fourth cycle, the converter 28 connects 1 outputs of blocks 23 and 24, respectively, to the first l, second inputs of multiplier 21, and preliminarily 27 selects from them the values CO, + 1 / W, and (C G,), The pumped down multipliers are recorded and triggered 22 groups. After that, in the first cycle, from block 24, the value G, l, is fed to the first waves of the board 21 and the second inputs of the transformer 5 tons of 28 switches on the value oCo o The value G obtained at the outputs of the multiplier 21 the contents of the trigger 22 groups, in result

0

tat value h

on the twenty-sixth

also rewrites block 23,

For finding it is necessary to calculate the value of CO, which at m 8 is equal to Cx) d), -

B5 OЈ recorded in block 25, and the value

KUf is in block 24 o Therefore, at the twenty-seventh cycle, converter 28 connects the outputs of block 25 to the first inputs of the multiplier 21 "and the outputs of block 24 to the second inputs. As a result, the outputs of multiplier 21 receive the product

Wt KU cyL8j

which is recorded on trigger 22 groups. At the twenty-eighth cycle, the value 00 is recorded in blocks 23 and 24 and remains on the flip-flops 11,

The farther locator x ,, the magnitude of Cx) 5 and the locator x are calculated in a similar way to "In total, it is spent together with a record lx in block 23 of twelve cycles. So ate fortieth

ha and x

tact locators h (are recorded in block 23. In the case when G, + Gg

It turns out

root z is HJ of equation (2). On the fifth stroke, the decoder 35 checks the state of the group of flip-flops 22.

Kepi they are in zero zero,

2 - then the trigger is set to one state, i.e., G, +, 14 is set. After that, the value of G, + r Gi is calculated, which is written to blocks 23 and 24 on the tenth cycle. At the same cycle, the state the counter 17 is allocated by the decoder 34, the signal from the output of which passes through the open, covered element AND 16 and transfers the counter 17 to the state of forty-one. It is from this state that the definition of z, begins. The magnitude Gj + G, G2 is deducted from block 24 by a signal from converter 27 and passes to converter 31, from whose outputs

the value of G, G2 falls on the second inputs of the multiplier 21. At the same time, the value of oZ t is applied to its first inputs. Thus, the value z will be written to the triggers of the 22nd group

In the forty-second state of the counter 17 (this corresponds to the twelfth tact from the beginning of the counting), the converter 27 writes off the block 23 and supplies the first inputs of the multiplier 21 with the G value, and to its second inputs the converter 28 connects the Y value. The value of Gt is added to the contents of the trigger 22 groups and as a result the first

locator x

MS

-t- z

which on

The forty-third state of the counter 17 is recorded in block 23. The values of z4 and rf are obtained in the same way as CO2, C03. Thereafter, x2 and x are calculated. The calculations and the recording of xg, x in block 23 take 6 ticks and end on the forty-ninth state of the counter 17. Now it is required to determine the value (J) of errors on the xj error locators and syndromes S. They are determined using the following formulas:

En

)

Where

G G j | - x | G

jli-0

Gi elementary symmetric functions of locators

mistakes.

55238114

When calculating the three values of pshi

OK THESE FORMULA FORMULAS (R GFINIMLE LID

Lf

47)

C, C

(eight)

five

0

At the beginning, G p and G, 2 are determined by formulas (8). The values of x (, x2 them; recorded from block 23, a G and G2 - in the calculator 7. Calculations start from the fifty first state of the counter 17. At the same time, the converter 23 connects through the multiplexer 19 to the first inputs of the multiplier 21 inputs 36 and on its second inputs the output of the HE element 18 "Converter 32 selects from calculator 7 the value a oi ° is connected to the second 5 inputs of multiplier 21" The result of multiplying o6 ° G, G, is recorded on group triggers 22, the selection from block 23 and multiplying by the U of the locator x (. The locator x, is added with C on the triggers 22 the group and the resulting value is written in blocks 23 and 24, and 1 1 is determined by the formulas (8) G 2 and is written in the same block: 23 and 24, then proceed to the calculation, while at the beginning. The numerator and then the denominator of the formula (7) are found.To find the number - l syndrome S0, S and S write off the calculator 7 7, the inputs 37 and the multiplexer 20 to the second inputs of the resampling 32, which specifies the addresses of the readable syndromes SJ. When calculating

0

3

0

five

0

five

numerator

G "and

42

is taken from block 23. The calculation of the numerator is performed similarly to the previous one and the result is recorded in block 24. The denominator of expression (7) is calculated similarly, with GH and G, 2 taken from block 24, and x from block 23 ,, the value of the denominator is written block 23. Now the numerator must be divided by the denominator, therefore the numerator from block 24 is fed to the second inputs of multiplier 21 via the input of multiplexer 20, and the denominator from block 23 through the converter 30 and multiplexer 19 is fed to the first inputs of multiplier 21. denote by a, then the output of the converter 30 is 1 / a, which is multiplied by the numerator. As a result, the outputs of multiplier 21 are given a value of t, i, which is written to a group of 22 flip-flops, and then to block 24. The remaining values and cf3 are obtained and written to block 24 in the same way.

Therefore, the x2, xg and x error locators are recorded in block 23, and the values of Cf,, (jz and - in block 24. Then, the value of x ,, which is the address of the element distorted by means of signals from the first outputs of the converter 27 is described from block 23 and supplied to the buffer accumulator 2, as a result, a distorted element with address x is fed to block 3 modulo two sum-fopoB, to the second inputs of which the converter 27 with a signal from the second outputs writes off from the block

24 value of Cf,. With the addition of bits 25, and this provides an increase in the distorted element with tp, decoding fidelity occurs,

Si

& L

to

the correction, and the corrected element is recorded again in buffer buffer 2 at the same address. The other two elements of the code block are corrected in the same way. Since after the correction the elements are written at the previous address, the order of the elements in the code block is not violated,

After all errors are corrected, the signal from the third output of the converter 27 passes through the OR 9 element, opens the key block 10 and reads the information part of the code block from the buffer accumulator 2. In the event of double errors, what is determined in the calculator 7) is similar to error locators x, and xz is obtained by solving the quadratic equation Ch + lO + 1 0, and with a single error x C.

Thus, the device provides for the correction of three errors,

0

Yu

Corrected

fatttMf

P

No mistakes

-

AND

Claims (1)

ERROR MANAGEMENT DEVICE, containing a memory unit, the inputs of which are connected to the first information inputs of the buffer storage device and the inputs of the syndrome generator, the outputs of which are connected to the inputs of the syndrome storage device, the outputs of which are connected to the inputs of the error decoder and information inputs of the calculator of elementary symmetric functions, outputs of the buffer the drive are connected to the first inputs of the adder block modulo two, the outputs of which are connected to the second information inputs of the buffer to the drive, the first the output of the error decoder is connected to the control input of the calculator of elementary symmetric functions, the calculator of locators and error values performed on the counter, the first, second and third code converters, the first and second memory blocks, the first and second multiplexers, the multiplier, the group of triggers, the group of adders modulo two, the first decoder, the ring shift register, the first element AND and the element NOT, the input of which under the keys to the bus of zero potential, the first input of the first element And is connected to the clock input the output of the first element AND is connected to the counter input of the counter, the outputs of which are connected to the inputs of the first decoder and the first and second code converters, the first and second outputs of the first code converter are connected to the address and control inputs of the first and second memory blocks, respectively, the outputs of the first block the memory is connected to the corresponding primary information inputs of the first multiplexer and the first control inputs of the buffer storage, the outputs of the second memory block are connected to the corresponding The first information inputs of the second multiplexer and the second inputs of the adders block are modulo two, the first and second outputs of the second code converter are connected to the address inputs of the first and second multiplexers, respectively, the outputs of which are connected to the inputs of the same multiplier, the outputs of which are connected to the C-inputs of the corresponding triggers of the group , the inverse output of each group trigger is connected to its D-input, the direct outputs of the group triggers are connected to the corresponding information inputs of the memory blocks, the output d element is NOT connected to the second information inputs of the multiplexers, the output of each adder modulo is two groups, the last is connected to the first input of the subsequent adder modulo two groups, the third information inputs of the first multiplexer are connected respectively to the zero potential bus, the first input of the first adder modulo two groups and the output of all adders modulo two $ groups, the outputs of the ring shift register and the third code converter are connected respectively to the third and fourth information to the input inputs of the second multiplexer, characterized in that, in order to increase the reliability of the device, OR elements and a key block are introduced into it, four-fifth, sixth and sixth code converters ₅ third memory block are introduced into the calculator of locators and error values , the first and second triggers, the second element And and the second decoder, the inputs of which and the first inputs of the annular shift register 20 are combined and connected to the outputs of the triggers of the group, the output of the first decoder is connected to the first input of the second element And, the output of which is connected to the input of the counter is 25 meters, the output of the second decoder is connected to the S-input of the second trigger, the direct output of which is connected to the second input of the second element AND, the counter zeroing input and the R-inputs of the first and second triggers are combined and connected to the Reset device input, the inputs of the fourth, fifth and sixth code converters are connected to the outputs of the first 35 and second memory and counter blocks, respectively, the outputs of the fourth code converter are connected respectively to the first inputs of the first and second inputs of all adders in mode There are two 40 groups and to the fourth information inputs of the first multiplexer, the outputs of the third memory block and the fifth code converter are connected to the fifth information inputs of the first and second multiplexers, the output of the first trigger is connected to the second input of the first element. And, the first outputs of the sixth code converter are connected to the second inputs of the shift _register} annular second outputs sixth code converter connected to the second control input calculating elementary symmetric function controlled whose output is connected to the S-input of the first trigger of the calculator of the locators of error values, the first and second information outputs of the calculator of Elementary symmetric functions are connected to the six information information inputs of the first and second multiplexers, the calculator of locators and error values, the third output of the first converter of the code of the locator calculator and error values and the second output of the decoder <errors are connected to the inputs of the OR element, the output of which is connected to the control input of the key block, the second the control input of the buffer drive and is the control output of the device, the information inputs of the key block are connected to the outputs of the adder block modulo two, the outputs of the key block are the corresponding information outputs of the device.