SU1550612A1 - Threshold device - Google Patents

Abstract

The invention relates to a pulse technique and can be used in electronic measuring equipment, as well as in devices for the detection of useful pulse signals against the background of noise interference with a slowly varying intensity in a wide dynamic range. The aim of the invention is to increase speed. The presence of the operational amplifier 5 and the diode 7 makes it possible to reduce the time for establishing the initial conditions after the impact of the pulse voltage acting on the input, due to the rapid discharge of the capacitor 8 of the low-pass filter 6. In addition, the threshold device contains a voltage divider 3 and an operational amplifier 1 covered by a positive feedback. 2 Il.

Description

figure 1

3155

The invention relates to a pulse technique and can be used in electronic measuring equipment, as well as in devices for the detection of useful pulse signals against the background of noise interference with a slowly varying intensity in a wide dynamic range.

The aim of the invention is to increase the speed of trips.

Fig. 1 is a schematic diagram of the proposed threshold device; in fig. 2 - time diagrams that show his work.

The threshold device contains an operational amplifier (OA) 1, covered by positive feedback, a connection made on a resistor 2, the output of which is the device output, a L-shaped voltage divider 3 connected between the input bus 4 and the non-inverting input of the operational amplifier 1 , while the output of the L-shaped divider 3 voltage is connected to the non-inverting input of an additional operational amplifier (op-amp) 5, the inverting input of which is connected directly to the output of the low-pass filter 6 in the form of an RC circuit and an inverter Valid present operational amplifier 1 through a diode 7 and to the output of the additional operational amplifier 5 and the input of low pass filter 6.

The threshold device operates as follows.

When a constant component noise interference (U0) of positive polarity arrives at the input bus 4 when the input impulse voltage of the signal is zero (U8) tMMn 0) (see Fig. 2a), the voltage from the output of the divider 3 voltage (idep.0) simultaneously enters the non-inverting inputs of OU 1 and 5.

The voltage that goes to the non-inverting input of the OU1, with a threshold voltage (Upor0) with a zero level, puts it into the operation mode. OU 1, due to the positive feedback made on resistor 2, operates in trigger mode. When OU1 is triggered, its output produces a constant voltage of positive polarity (Fig. 2d). With the voltage of voltage 0, the OP5 switches to the saturation mode and at its output a constant voltage of positive polarity is released.

Q

d 5

Q

five

In this case, the output voltage of the OU5 and the diode 7 is transferred to the non-conductive mode. FIG. 1 shows the inclusion of a diode 7 for input voltages of a device of positive polarity. The voltage from the output of the OU5 through the resistor 8 is fed to the potential output of the capacitor 9 and charges it to the level Unop.oc of a constant time of the low-pass filter 6 included in the negative feedback circuit of the OU5.

During the time interval, (Fig. 2a, b), the equality of the output voltage of the divider 3 (idel 0) and the voltage on the potential output of the capacitor 9 (Unop.o) occurs. The time interval is approximately equal to tRC. When UAe / io and por.o, Oy1 switches to the steady state (fig. 2d), and the output voltage of the oy5 decreases sharply to 0-0 (} 5 (fig. 2c). After switching operating modes of ОУ1 and 5, the device is transferred to the established mode, with a constant negative voltage polarity released at its output. When a pulse voltage signal (UBX IMP) arrives at the input bus 4 of the device (tMW (1, which exceeds the time constant () of the lowpass filter 6 (), the output of the divider 3 is no voltage is allocated (idel-imp. h) which goes simultaneously to non-inverting inputs, ОУ1 and 5. If imp exceeds the level Unop0, then at the moment of time ОУ1 ОУ1 is activated and a constant voltage is released at its output positive polarity. Simultaneously with the operation of the OU1, the OU5 switches to the saturation mode and at its output a maximum voltage of the positive polarity is released, which switches the diode 7 to the non-conducting mode. The voltage from the OU5 output through the resistor 8 goes to the potential terminal of the capacitor 9 and charges it to the level. UHOO.imen with a filter time constant of 6 low pass.

The diode 7 on the time interval Cr-C3 is in the non-conductive mode and, practically, its reverse resistance (r „06r,) does not affect the charging process of the capacitor 9 if Ga.ot.K, where R is the resistance of the resistor 8. In the time of arrival of the time t3 voltage and Aed. Imgm Utrop.MMin (Fig. 2a, b).

5155

During idelim (the switching of the operating modes of the OU1 and 5 occurs. At the output of the OU 1, a constant polar negative voltage is set, and at the output of the OU5 the positive polarity decreases sharply to the level U8t1K., ObS. With Uebix, OU5 7 UBblx oo;) 5 (Fig. 2c). At the time t. the pulse voltage of the signal (U8X IM1M) on the output bus 4 of the device decreases to zero. When a constant component of noise interference (U0) is present on the input pin 4 of the voltage device, the voltage output of the voltage divider 3 decreases to the level UAe / io. At f de Uo UcropKwtM Ha, the output of the OU1 will maintain the voltage polarity of the steady state (Fig. 2d).

When U then imp, the voltage at the output of the OU5 reverses its polarity, while the diode 7 is transferred to the conduction mode and through its open transition in the time interval t4-tg. capacitor 9 is discharged (Fig. 2c).

The discharge time of capacitor 9 (tm) can be found from

GG-15 + a.yy.Ј.h, ir “% LXy 1 + vko9 J

where Kau is the gain coefficient of ОУ5;

j $ is the depth of the switched negative feedback of the OU5;

-111

TO,

resistance of diode 7 in the conductivity mode;

77m7 output resistance OU5

1 + isKnu

° d covered by negative

feedback.

Because

(lii +

VIT ..I4.0V ..

F

° H

1 + yk

04

then tp0 (, “Rc Filter a 6 low frequencies, which provides a relatively high speed device.

After the capacitor 9 is discharged, the voltage Unopo is applied to its potential output at the time ts. On admission to

input bus 4 pulse devices

min

voltage signal (Uexv, Mn, 2 with t ЈRC, and if the voltage at the output of divider 3 (UAen WM02) exceeds Unop.0, OU1 is triggered, Ex.

Q 5 0

five

0

five

0

five

0

five

26

UAe, imp, 2 is fed to the non-inverting input of ОУ5, while its output is;;. The voltage increases dramatically, and diode 7 is switched to non-conductive mode. The output voltage of the OU5 through the resistor 8 is supplied to the potential output of the capacitor 9 and charges it, while during the duration of the pulse voltage, the threshold voltage (U p o) is increased by the value of PGp, the value of & expressions

IMD /

with RC

Lips {G imp ideas U1mgt2 / K ° CH5

where K 045 is the gain coefficient of ОУ5.

As follows from the above expression, the voltage gain of the amp amp is inversely proportional to the 7C1 frequency of the low-pass filter 6 constant.

During the operation of the pulse voltage of the signal (simp) in the device circuit, the ipod7 inequality is maintained (Unop 0+ & &ory;, which is provided by appropriately choosing the ratio ЈRC and the expected maximum duration of the pulse voltage of the signal (si / ad) In practice, when designing a circuit, the condition with max should be maintained. After reducing the pulse voltage of the signal to zero (U e imp 0.), the OU1 switches to the initial mode, and at the output of divider 3, the voltage changes from c U Imp51 to level. Voltage (U Ropo + UUnQp), which is supplied to the inverting input of the OU5, exceeds the level of voltage 11second.0, which is fed to its inverting input from the output of the voltage divider 3 (ipor + & imp) - go about.

Claims (1)

In this case, the OU5 operation mode is switched, and its output voltage changes its polarity to the opposite. The output voltage of the OU5 diode 7 is transferred to the conduction mode and, through its open transition, in a relatively short time interval. (srat - the capacitor 9 is discharged to the level of a hyuoh mechanism, the discharge mechanism of which is similar to the mechanism of discharge at c 7 megapixels. Invention formula Threshold device containing an operational amplifier covered by positive feedback, output 7155061 which is an output of the device, a low-pass filter in the form of an RC circuit, and an L-shaped voltage divider connected between the input bus and the non-inverting input of the operational amplifier, the inverting input of which is connected to the output of the low-pass filter characterized by that, in order to increase speed, an additional ten 0 eight an operational amplifier, the non-inverting input of which is connected to the output of the L-shaped voltage divider, and the inverting input is connected to the output of the low-pass filter in the form of an RC circuit directly and through a diode to the input of the low-pass filter in the form of an RC circuit that is connected to the output additional operational amplifier. 2