SU1548792A1 - Device for diagnostics of multiprocessor computing complex - Google Patents

Abstract

The invention relates to computing and can be used to troubleshoot multiprocessor computing systems with increased reliability. The aim of the invention is to improve the accuracy of diagnosis. The goal is achieved in that the device contains a control unit 3, the first to fourth groups of receivers 4-7, the decoder 8, the first and second reference elements 9 and 10, the first and second groups of transmitters 11 and 12, the register 13 and the switch 14. 1 .P. f-ly, 2 ill., 2 tab.

Description

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The invention relates to computing and can be used to troubleshoot multiprocessor computing systems with increased reliability.

The purpose of the invention is to improve the accuracy of diagnosis.

Figure 1 presents the scheme of the device; Fig. 2 is a block diagram of a blocking circuit.

The diagnostic device of a multiprocessor computer complex contains the first and second groups of information inputs-outputs 1 and 2, j control unit 3, the first group of receivers 4, the second group of receivers 5, the third group of receivers 6, the fourth group of receivers 7, the decoder 8, the first 9 and the second 10 comparison elements 20, first group of transmitters 11e, second group of transmitters 12, register 13, switch 14, first group of information inputs 15 s, second group of information inputs 16, 25 first 17 and second 18 outputs of the attribute corresponding to vulva, the first 19.1 and second 19.2 inputs feature the presence of diagnostic procedures, the first to fourth inputs 19.3-19.6 mode, 0 the first to fourth groups of outputs 20-23 to processor commands, present in the state of the relationship. Control unit 3 contains the first 24 and second 25 decoders, the first to the fourth elements And 26-29, the first to the seventh inputs 30-36 of the mode, the first to the fourth outputs 37-40, the first and second groups of outputs 41 and 42.

Receivers 4-6 are provided for summing up to this subscriber - the central processor (CPU) or input / output processor (UIP) of all control and information signals from another processor, which is an arbitrator in this communication session.

In the working standby mode, in the absence of faults in the trunk lines, all receivers and transmitters are unlocked and wait for the command from the arbitrator. The assignment of one or another command code with its implementation in the combinational circuit of a preselected processor that is in a state of interconnection is carried out through groups of outputs 20 and 21 or 22 and 23. The condition of the absence of diagnostic procedures is 35

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whose logical zeros are at inputs 19.1 and 19.2.

In the mode of performing diagnostic checks, the value 1 at input 19.2 ensures that the switch outputs 14 addresses in accordance with the bits (18-23) of register 13. The value 1 at input 19.1 when there is a value 1 at input 19.2 sets the simulation mode. In this case, since the moment when the value 1 is generated at the input 19. The diagnosed processor in the simulation mode reproduces the operation in the same way as when receiving a control word when servicing the work program. Inputs 19.3-19.6 are provided respectively for locking and unlocking the receivers and transmitters during their separate operation in the diagnostic mode.

Diagnostic procedures are divided into internal and external checks.

In the internal microdiagnostics mode, prohibitive levels are supplied to the inputs 19.3-19.6, after which the processor is logically disconnected from the computer complex and thus eliminates the influence of the diagnosed processor on the work program, the operation of which is provided by the operation of the computer system with the participation of other subscribers. Next, the information from the diagnostic carrier of the service processor (SP) is entered into receiver 6. Then logical units are set simultaneously at inputs 19.1 and 19.2, then, according to the bit values of receiver 6, a group of receivers 4 and 5 or 6 and 7 is excited. th bit of receiver 6 is equal to .1, then work is carried out through inputs-outputs 1; if the 14th bit of receiver 6 is equal to O, then work is carried out through inputs-outputs 2. Recording various combinations of codes from the test set to the receiver 6 excites groups of exits 20 and 21 or 22 and 23, which ensures the successive execution of each command, followed by verification of the results obtained for the entire spectrum of operations that are inherent in the diagnosed processor.

One of the verification procedures is to determine the correct operation of receivers 4 or 6 for a CPU or UIP. In this case, excited alternately.

the outputs of these receivers, using bits 1-7, 9, and 10-13 (if clause 12), are simultaneously for each verification example, providing bits 18-23 of receiver 6 of equivalent positional weight at the first inputs of comparison elements 9 and 10. If the values of outputs 17 or 18 correspond to the standard, the diagnostic unit proceeds to the following example. Otherwise, the diagnostic unit stops with the exact indication of the address of the diagnosed receiver. In the diagnostic unit tools included in the SP, a special counter is provided, which is incremented in each case of comparing the outputs of the diagnosed processor with the standard, which is read in advance from the diagnostic medium. When the diagnostic unit is stopped, the comparison counter indicates the number, and hence the exact location of the malfunction.

In the mode of external microdiagnostics, pairs of processors are involved in the verification procedures: CPU CPU, CPU-PVV, CPU-SP, CPU-PVV, CPU-CPU, PVV-CPU,. Moreover, the dianostical test set for any processor numbers of the same name is the same for mutual diagnostics. For example, the test set pr when interdiagnostic UIP and UIP - UIP j is the same. As a rule, when executing external microdiagnostics both the i-th and j-th subscribers perform inter-diagnostics using only one trunk, therefore, the computing complex in the interval of microdiagnostics performs a working program using means of another trunk without the participation of the 1st and j-ro processors. At the same time, in the means of working processors occupied by the diagnostic procedure, the numbers i and j are registered as subscribers absent (disabled) in the configuration of the complex. In addition, all working processors on the input of receivers and transmitters for the diagnosed highway are blocked, in order to eliminate the effect of redundant code overlays on the monitored lines, and also to prevent the highway from disrupting the operation of the computing complex.

Through two sessions of checking P.-P. microdiagnosis performs health check

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all receivers and transmitters of processors P; and Hj on the working inputs with an exact indication of the location of the defective amplifier, if any, as well as checking the trunk bus for any breaks, short circuits and correctness of the terminating resistor circuits, indicating the exact location of the faulty connector and the number of the contact.

Consider the example of mutual microdiagnostics through the inputs-outputs 2 for a session, assuming that both processors P j and P have passed the stage of internal diagnostics.

At the initial time, the receivers 6 are reset in both processors, logical zeros are set up at inputs 19,1-19.6, code 000010 is set in bits (8-23) of receiver 6, where the 23rd bit is simulated switch parity. Further, at the inputs 19.1-19.6 are set accordingly:

in the i-th processor 0, 1.0, 0, 0.1;

in the j-th processor 0, 1.0, 1, O, O.

Due to this control, only the group of transmitters 1 2 in the i-th processor and the group of receivers 6 and 7 in the j-th processor are unlocked. In the i-th processor, the activated output of the decoder 8 weighing one will excite the output of the first transmitter 12. In the j-th processor the first receiver 6, activated by the unit code, is compared with the positional weight one given by the decoder 8, and therefore the output 18 must be a unit code . The exit state 18, compared with a single standard of the diagnostic block, will initialize the reading of the diagnostic kit / for the next test example.

In case of a single standard mismatch with output 18, the diagnostic unit suspends operation and provides the address of the faulty bus (see table 1).

The transition from the first session of mutual microdiagnostics to the second P; - P1 is carried out by a new command set by the operator using the JV tools.

Table 2 shows one of the variants of the test set, which is used to perform external diagnostics of tires for detecting open circuits, the presence of short circuits, and the presence of short circuits. false codes of units due to defects in receivers and transmitters.

In this case, the switch 1 of the 1st subscriber from the receiver 6 enters the code of the zero address, and the inputs of the diagnosed transmitters in the i-th processor and the inputs of the diagnosed receivers j-ro of the subscriber are unlocked, the j-th subscriber to the first, second, third and t .d the inputs of element 9 or 10) of the comparison are successively supplied through a decoder 8 weights: one, two, three, and so on. After each weight, the output of the corresponding element 9 (or 10) of the comparison is compared by a single standard of the diagnostic unit. The occurrence of any unit at the output of the comparison element is recorded by the diagnostic unit as a fact of the presence of a fault in the tire.

Claims (2)

1. Device for diagnostics of a multiprocessor computer complex containing the first and second groups of 25 n transmitters in each, where n is the number of processors of the computer complex, the decoder, the register, the first and second elements of the comparison with the first on the fourth group of n receivers in each, and the outputs of the transmitters of the first group are combined with the information inputs of the receivers of the first and second groups and are connected respectively to the information inputs-outputs the first group of the device, the outputs of the transmitters of the second L of the unit are combined with the information inputs of the receivers of the third and fourth groups and connected respectively to the information inputs and outputs of the second group of the device, the first input of which is connected to the blocking inputs of the transmitters of the first group, the second input of the device mode is connected to the inputs blocking transmitters of the second group, the information inputs of the first group of the device are connected respectively to the information inputs of the register, the group of outputs of the decoder with first to n-th are connected respectively to the information inputs of the transmitters of the first group, to the information inputs of the transmitters of the second group, to the inputs of the first group of the first comparison element and to the inputs of the first group of the second comparison element, the output of the first and second comparison elements are connected respectively to the first 0 five 0 five 0 five 40 five 0 55 The second sign output corresponds to a device standard, characterized in that, in order to improve the diagnostic accuracy, it contains a control unit and a switch, the outputs of the first register group are connected to the first control inputs of the first and third groups respectively, the outputs of the second register group are connected respectively to information inputs of the first group of switch, the outputs of which are connected to the inputs of the decoder, the first, second and third outputs of the register are connected respectively to the first, second and tr To the other inputs of the control unit mode, the outputs of the first group of which are connected to the first control inputs of the receivers of the second group, the outputs of the second group of the control unit are connected to the first control inputs of the receivers of the fourth group, the outputs of the receivers of the first group are connected to the inputs of the second group of the first comparison element and to the outputs of the first group of the device for connection to the first group of inputs of the processor commands, which is in the interconnected state, the outputs of the second group of the device for connecting to the second group of inputs The processor commands in the interconnection state are connected to the outputs of receivers of the second group, the outputs of receivers of the third group are connected to the inputs of the second group of the second comparison element and to the outputs of the third group of the device for connection to the third group of inputs of the processor that is in interconnection, the outputs of the fourth group of the device for connection to the fourth group of inputs of the processor, which is in the state of interconnection, are connected to the outputs of the receivers of the fourth group, information The inputs of the second group of the device are connected respectively to the information inputs of the second group of the switch, the third and fourth inputs of the mode and the first input of the presence of diagnostic procedures of the device are connected respectively to the fourth, fifth and sixth inputs of the control unit whose first output is connected to the second control inputs receivers of the first and second groups, the second output of the control unit is connected to the third control inputs of the acceptance of the first and second groups, the second - the input of the sign of the presence of ble procedures device connected to the control input of the switch and the entry to the Seventh control unit, - the third output is connected to the second control inputs of the receivers (third and fourth groups, the fourth control unit k4 third output is connected the control inputs of the third and fourth receivers groups. 2. The device according to claim 1, wherein the control unit comprises first and fourth elements I, the first and second decoders, the first input of the control unit being connected to the first synchronous input of the first decoder, to the first (inverse) synchronous input of the second decoder, to the first (inverse) input of the first element And to the first input of the second element And, the second input of the control unit mode is connected to the first information inputs of the first and second decoder, the third input of the mode of the control unit is connected to 0 five 0 five the second information inputs of the first and second decoders, the outputs of which are connected respectively to the outputs of the first and second groups of the control unit, the fourth and fifth inputs of the mode of which are connected respectively to the first inputs of the third and fourth elements, And the output of the third element, And connected to the first the output of the control unit, the output of the second element I is connected to the second (inverse) input of the third element I and to the second output of the control unit, the sixth mode input of which is connected to the second inputs of the first and second e And to the second synchronization inputs of the first and second decoders, the seventh input of the control unit mode is connected to the third inputs of the first and second And elements, the output of the first And element is connected to the fourth output of the control unit and to the second (inverse) input of the fourth And element, whose output connected to the third output of the control unit. Table 1 Number Tire number in- pa 1 2 3 4 5n-4 n-3 n-2 n-I 1 code on the transmitter of the 1st subscriber io ° ooooh. ; oh oh oh oh oh The code on the receivers j-ro subscriber 100000000000000000 2 code on the transmitter of the 1st subscriber 0100000. . ... 000000 The code on the receivers j-ro subscriber 01000000000000000 3 code on the transmitter of the 1st subscriber 0010000000000000 The code on the receivers j-ro subscriber 001000000000000000 Code on the 1st subscriber's transmitters p00000000000001 The code on the receivers j-ro subscriber 00000000000001 Number Tire number in- ra123456789p-3 p-2 ph I 1 code on the transmitter of the 1st subscriber ooooooooooooooooo 2Code at the first inputs of elements 9 and 10 comparing 100000000OOOOOOOO 3010000000 ... OOOOOOOOO 4001000000OOOOOOOOOO 5000100000 LTD. 6000010000OOOOOOOOOO  p OOOOOOOOO0000010 nil ООООООООО0000001 J7 38 41 J3v FIG. 2