SU1540019A1 - Clock synechronization device - Google Patents

Abstract

The invention relates to the field of telecommunications and can be used for clock synchronization in digital information transmission systems. The purpose of the invention is to improve the synchronization accuracy. The device contains a band-pass filter 1, a delay line 3, an AND element 5, a differentiation unit 6, a strobe pulse generator 7, a threshold unit 10. Amplifier 2, a comparator 4, an additional delay line 8 and a voltage divider 9 are inserted into the device. The proposed device provides, in comparison with the prototype, higher synchronization accuracy by fixing the maximum points of the signal at the output of filter 1 and eliminating the dependence of the temporal position of the gating pulses on the amplitude of the quasi-harmonic oscillation. 2 Il.

Description

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The invention relates to telecommunications and can be used for clock synchronization in digital information transmission systems.

The purpose of the invention is to improve the synchronization accuracy.

FIG. 1 is a block diagram of the deviceJ in FIG. 2 - time diagrams of his work.10

The device comprises a band-pass filter 1, an amplifier 2, a delay line 3, a comparator 4, an AND 5 element, a differentiation unit, a gate driver 15 7 strobe pulses, an additional delay line 8, a voltage divider 9 and a threshold unit 10.

The device works as follows .20

The input of the bandpass filter 1 receives pulses of a digital signal. At the output of the bandpass filter 1, a quaeiharmonic oscillation occurs, one of the possible implementations of which 25 is shown in FIG. 2a in the form of a curve I (a signal of the same form acts at the output of divider 9).

- arccos S

1+ - | 1-4 () (- sincof-coswt - sinwt) 2 (sinW -) t)

where si is the angular frequency of the quasi-harmonic

 natural oscillation; K is the amplitude ratio (the division factor of the voltage divider 9).

Relation (1) can be obtained by solving the equation

sinwt ksin (t-f3) j (2)

As can be seen from (1), at a fixed frequency of quasi-harmonic oscillation and a constant division factor of divider 9, the delay time of line 3, necessary for fixing the maximum points of the quasi-harmonic oscillation, does not depend on the level of this oscillation.

Due to the presence of the voltage divider 9, the ratio between the signal levels at the inputs of the comparator is constant, as a result of which the maximum points are monitored with high accuracy, the rectangular pulses at the comparator output have

The signal from the output of the bandpass filter 1, amplified by amplifier 2 and delayed by an amount of Ј3 via line 3 (IT curve. In Fig. 2a) is fed to the information input of the comparator, torus 4. The threshold input of the comparator 4 receives a signal from the amplifier output, weakened a divider 9 times K (in practice, they usually take K 2).

At the moments when the signal level at the information input exceeds the threshold level at the output of the comparator 4, it is generated 1. Otherwise, O will act at its output.

As can be seen from FIG. In order to accurately fix the maximum points of the quasi-harmonic oscillation (which are separated from each other by the time interval) depending on the frequency and the ratio of the amplitudes of the oscillations at the input and output of the voltage divider 9, the delay time of line 3 is selected from the relation:

form of the meander (figv). These pulses are fed to one of the inputs of the AND 5 element, to the other input of which pulses are received from the output of the threshold unit 0 (Fig. 26). A change in the pulse duration at the output of the threshold unit 10 is associated with a change in the amplitude of oscillation at its input.

The trigger threshold (Un in Fig. 2a) of the threshold unit 10 is selected based on the required amount of immunity from interference. Thus, positive differences from the output of comparator 4 are transmitted to the output of element 5, which are formed at a level above the interference level (Figure 2d). Then, through the differentiating unit 6, these pulses are fed to the gate driver 7. The last of the short pulses (FIG. 2d) generates the pulses shown in FIG. 2e, which, passing through the output delay line 8 of the circuit, acquire the necessary temporary position.

Claims (1)

Thus, the proposed device provides, in comparison with the device-prototype, higher synchronization accuracy by fixing the maximum points of the signal at the output of the bandpass filter 1 and eliminating the dependence of the temporal position of the gating pulses on the amplitude of the quaeoharmonic oscillation. Invention Formula A clock synchronization device containing an AND element, a threshold unit and a bandpass filter whose input is the device input, as well as a differentiation unit connected in series, a strobe pulse generator and a delay line, L aa d e 1 o Secondly, it is an output of a device, characterized in that, in order to increase synchronization accuracy, a voltage divider, an additional delay line, a comparator and an amplifier, whose input is connected to the output of the bandpass filter, are input, and the output is connected to the inputs of the additional delay line and divider. voltage, the outputs of which are connected respectively to the information and threshold inputs of the comparators, the output of which is connected to the input of the element I, the other input of which is connected to the output of the threshold unit, and the output connected to the input of the differentiation unit, wherein the input of the threshold unit is connected to the output of the voltage divider. 7 L Jl l JI 1 1