SU151876A1 - Semi-adder circuit - Google Patents

Semi-adder circuit

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Publication number
SU151876A1
SU151876A1 SU755165A SU755165A SU151876A1 SU 151876 A1 SU151876 A1 SU 151876A1 SU 755165 A SU755165 A SU 755165A SU 755165 A SU755165 A SU 755165A SU 151876 A1 SU151876 A1 SU 151876A1
Authority
SU
USSR - Soviet Union
Prior art keywords
semi
adder circuit
diodes
windings
circuit
Prior art date
Application number
SU755165A
Other languages
Russian (ru)
Inventor
Ю.А. Попов
Л.Н. Сумароков
Original Assignee
Ю.А. Попов
Л.Н. Сумароков
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ю.А. Попов, Л.Н. Сумароков filed Critical Ю.А. Попов
Priority to SU755165A priority Critical patent/SU151876A1/en
Application granted granted Critical
Publication of SU151876A1 publication Critical patent/SU151876A1/en

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Description

где Z - импеданс обмотки трансформатора Тр.where Z is the impedance of the transformer winding Tr.

Если импульсы подаютс  на оба входа схемы одновременно (код 11), то вследствие встреч}1ого включени  обмоток трансформатора возникает короткое замыкание магнитного потока в сердечнике, харак-№151876-2If pulses are applied to both inputs of the circuit at the same time (code 11), then as a result of the first turn on of the transformer windings, a short circuit of the magnetic flux in the core occurs, characterization number 151876-2

теризующеес  тем, что импеданс обмоток Z 0. При этом происходит перераспределение соотношени  между амплитудами в точках GI (02) и б по сравнению с предыдущим случаем: амплитуда импульса в точке О (uz} уменьшитс , а в точке б увеличитс .It is influenced by the fact that the impedance of the windings is Z 0. In this case, the ratio between the amplitudes at the GI (02) and b points is redistributed compared to the previous case: the pulse amplitude at point O (uz} decreases, and at point b increases.

Выбором соответствуюш,их направлений смещени  +,. и -, можно добитьс  требуемого режима работы Полусумматора.By choosing the appropriate, their directions are offset + ,. and -, it is possible to achieve the required operating mode of the Half-Summator.

В качестве входных сопротивлений з и R могут быть использованы пр мые сопротивлени  диодов, причем дл  увеличени  логических возможностей схемы можно включать . по два диода на каждом из входов.The direct resistances of the diodes can be used as input resistances R and R, and you can turn on the circuitry to increase the logic capabilities. two diodes on each of the inputs.

Предлагаема  схема допускает гальваническое объединение выходов «перенос, что  вл етс  важным обсто тельством при конструктировании сумматора из двух полусумматоров.The proposed scheme allows galvanic coupling of the outputs "transfer, which is an important circumstance in the construction of an adder of two half adders.

Предмет изобретени Subject invention

Схема полусумматора, построенна  на диодах и сопротивлени х, отличаюш;а с  применением одного импульсного трансформатора содержащего две обмотки с равным количеством витков.A half-adder circuit, built on diodes and resistances, is different, and with the use of a single pulse transformer containing two windings with an equal number of turns.

/А 4,/ A 4,

SU755165A 1961-12-12 1961-12-12 Semi-adder circuit SU151876A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SU755165A SU151876A1 (en) 1961-12-12 1961-12-12 Semi-adder circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SU755165A SU151876A1 (en) 1961-12-12 1961-12-12 Semi-adder circuit

Publications (1)

Publication Number Publication Date
SU151876A1 true SU151876A1 (en) 1962-11-30

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ID=48306486

Family Applications (1)

Application Number Title Priority Date Filing Date
SU755165A SU151876A1 (en) 1961-12-12 1961-12-12 Semi-adder circuit

Country Status (1)

Country Link
SU (1) SU151876A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3466602A (en) * 1966-05-18 1969-09-09 Allen Bradley Co Single error detector for binary information

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3466602A (en) * 1966-05-18 1969-09-09 Allen Bradley Co Single error detector for binary information

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