SU1517109A1 - A.c. electric drive - Google Patents

Abstract

The invention relates to electrical engineering and can be used for frequency control of asynchronous motors for general industrial purposes. The aim of the invention is to increase the energy performance. The AC drive contains an asynchronous motor 1, two pairs of anti-parallel connected thyristors 2,3 and 4,5, a clock generator 26, a modulating voltage generator 29, logic elements 2I 18 ... 21 and amplifiers 10 ... 13. By introducing into its composition the third and fourth pairs of anti-parallel-connected thyristors 6.7 and 8.9, phase-shifting units 27.28, logic elements 2I-2I-2ILI 22.23 and 2ILI-2ILI-2I 24.25, amplifiers 14 ... 17 and performing generator 29 in the form of a series-connected integer frequency divider 30 and six-channel pulse distributor 31 is provided when operating at a lower frequency; there is no two-phase switching on mode of the motor, regardless of the angle of thyristors 2 ... 9. In this case, the goal is achieved in a wide range of voltage regulation of the engine power supply and its rotational frequency. 2 Il.

Description

t

(21) 4284841/24-07

(22) 07.15.87

(46) 10/23/89. Bul № 39 (7J) Donetsk Polytechnic Institute

(72) A.A., Shavelkin, V.B. Patapov and Yu.A. Bildeenko

(53) 621.316.727 (088.8)

(56) USSR Author's Certificate No. 1128362, cl. H 02 R 7/42.

USSR Author's Certificate No. 1035767, cl. H 02 R 7/12, 1982.

(54) AC ELECTRIC DRIVE

(57) The invention relates to electrical engineering and can be used for frequency control of asynchronous electric motors for general industrial purposes. The aim of the invention is the twisting of energy indicators. The AC drive contains an asynchronous motor 1, two pairs of anti-parallel connected thyristors

 and with

2, 3, and 4, 5, a synchronization pulse generator 26, a modulating voltage generator 29, logic elements 2I 18 ... 21 and amplifiers 10 ... 13. By introducing into its composition the third and fourth pairs of opposite-connected thyristors 6, 7 and 8, 9, phase-shifting units 27, 28, logic elements 2I-2I-2ILI 22, 23 and 2IPI-2ILI-2I 24, 25, amplifiers 14 ... 17 and generating the generator 29 in the form of serially connected integer divider 30 frequency and six-channel distributor 31 pulses is provided when operating at a lower frequency without p benching two-phase of the motor, regardless of the angle of thyristors 2 ... 9. In this case, the goal is achieved in a wide range of voltage regulation of the motor power supply and its frequency 6rap (en, 2 sludge).

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The invention relates to electrical engineering and can be used for frequency control of asynchronous motors of general industrial purposes.

The aim of the invention is to increase the energy performance.

FIG. 1 shows the flow diagram of the AC drive; in fig. 2 - time diagrams that show his work.

The AC drive contains an asynchronous three-phase electric motor 1, four pairs of oppositely connected thyristors 2 and 3, 4 and 5, 6 and 7, 8 and 9, eight amplifiers 10-17, four logic elements 2 and 18-2J, two logic elements 2 AND-2 AND-2 OR 22 and 23, two logical elements 2 OR-2 OR-2 AND 24 and 25, shaper 26 synchronizing and lpils, the first 27 and second 28 phase-shifting units, generator 29 of modulating voltages, composed of connected integer frequency divider 30, six-channel distributor 31 imp lsov. The first output of the nepBOii pair of counter-parallel nanoseconds of the connected thyristors 2 and 3 is intended for connection} 0ч1ш to the first terminal of the mains, the first output of the second pair of counter-parallel connected transistors 4 and

5 designed to connect to the second power supply terminal, the second output of the first pair of anti-parallel connected thyristors 2 and 3 and the first output of the third pair of anti-parallel connected thyristors

6 and 7 are combined and connected to the first output of the stator winding of the electric motor 1, the second output of which is connected to the combined second output of the second pair of anti-parallel connected thyristors 4 and 5 and the first output of the fourth pair of anti-parallel connected thyristor

8 and 9. The second outputs of the third pair of anti-parallel connected thyristors 6 and 7 and the fourth pair of is with three-parallel connected thyristors 8 and 9 are combined and connected to the third output of the stator winding of the electric motor 1, which is connected to the third terminal of the power supply network . The inputs of the synchronization pulse shaper 26 are intended to be connected to the power supply terminals, and the synch pulse shaper 26 is connected to the first input of the modulating voltage generator 29 formed by the first input of the integer frequency divider 30, the second input of which forms the second input of the modulating voltage generator 29 and is intended to give a frequency reference. The first inputs of the first 27 and second 28 phase shifters are designed to be connected to the first and second power supply terminals, respectively, the second inputs of the first 27 and second 28 phase shifters are combined to provide a voltage command signal. The first output of the six-channel distributor 31 pulses is connected to the first inputs of the first logic elements 2 I-2 I-2 OR 22 and 2 OR-2 IPI-2 And 24, the second output of the six-channel distributor 31 pulses is connected to the second input of the first logic element 2 OR - 2 IPI-2 And 24 and with the first input of the first logic element 2 And 18; the third output of the multi-channel distributor of 31 pulses is connected to the first inputs of the second logic element 2 I-2 I-2 OR 23 and the second control element 2 And 19; the fourth output of the six-channel distributor 31 pulses is connected to the second input of the second logical element 2 AND-2 AND-2 OR 23 and to the first input of the second logical element Z OR-2 OR- 2 AND 25; the fifth output of the six-channel distributor 31 11 pulses is connected to the first input of the third logic element 2 AND 20 and to the second input of the second logical element 2 OR- 2 11PI-2 And 25; the sixth output of the six-channel pulse distributor 31 is connected to the second input of the first logical element 2 I-2 I-2 OR 22 n with the first input of the fourth logical element 2 And 21, The first output of the first phase-shifting unit 27 is connected to the third input of the first logical element 2 I-2 AND-2 OR 22 and with the second input of the fourth logic element 2 And 21, the second output of the phase-shifting unit 27 soy, inna with the third input of the second

An I-2 AND-2 OR 2 loop element 2 and with the second input of the second logical element 2 And 19, the first output of the second phase-shifting unit 28 is connected to the fourth input of the first logical element 2 I-2 I-2 OR 22, with the second input the first logical element 2 And 18 and with the third and fourth inputs of the first logical element 2 OR-2 OR-2 And 24; The second output of the second phase-shifting unit 28 is connected to the second input of the third logical element 2 AND 20 with the fourth input of the second logical element 2 AND-2 AND-2 OR 23 and with the third and fourth inputs of the second logical element 2 OR-2 OR-2 AND 25. The outputs of the first and second logic elements 2 AND-2 AND-2 OR 22 and 23, respectively, through the fifth 14 and sixth 15 amplifiers are connected to the control circuits, respectively, of the thyristors 2 and 3 of the first pair. The outputs of the first and second logic elements 2 OR-2 OR-2 and 24 and 25, respectively, through the seventh 16 and eighth 17 amplifiers are connected to control circuits of thyristors 5 and 4, respectively, of the second pair. The outputs of the third and first logic elements 2 and 20 and 18, respectively, through the third 12 and first amplifiers are connected to the control circuits of the thyristors 6 and 7 of the third pair, respectively. The outputs of the fourth and second logic elements 2 And 21 and 19, respectively, through the fourth 13 and second 11 amplifiers are connected to control circuits of thyristors 8 and 9 of the fourth pair, respectively.

Phase-shifting units 27 and 28 produce two pulse sequences each, shifted by a half-period of the network frequency, and implement the principle of vertical control. The phase change of the output pulses is carried out by means of a voltage setting signal and applied to their second inputs.

The synchronization pulse generator 26 provides for the formation of a sequence of pulses synchronized with the moments of passage through zero phase voltages of the network, and their subsequent summation to obtain a signal with a frequency of 6G, where f is the voltage frequency of the network. In order for the voltage frequency of the power supply of the electric motor 1 Ss

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The number of times is less than the input one, the output signal of the driver of 26 sirens — lowers pulses is fed to the input of the six-channel distributors 31 pulses through the integer frequency divider 30, the frequency factor of which is set by the frequency setting signal Ur in accordance with the required rotation frequency of the electric motor 1. The sixth pulse distributor 31 is a six-count counter with a six-output decoder, on which pulse sequences are formed, the corresponding inputs m with frequency f, f, / -J

Electric variable current operates as follows.

The second inputs of the phase-shifting units 27 and 28 are supplied with a voltage setting signal, and the second input of the integer frequency divider 30 is a frequency setting signal Ur, with each value of Ur corresponding to a fixed coefficient; the input frequency f decreases, and cooTBeTCtseHHo is a fixed value of frequency f - power motor 1.

In this case, the operation of the electric drive at a fixed frequency is carried out as follows (Fig. 2). In accordance with the frequency value) input to the six-channel distributor of 31 pulses, the latter generates pulses at the corresponding outputs, -d (Fig. 2, a), whose frequency is equal to the specified value, /). The signals d 1-d J arrive at the corresponding inputs of logic elements 18-25, which also receive sequences of pulses from the outputs of the phase-shifting blocks 27 and 28 synchronized with the phase voltages of the network U and U ", the phase of which (/ is determined by the value of the reference signal U voltage. The control pulses Tj-Tg on thyristors 2-9 are formed on the output pulses of the phase-shifting blocks 27 and 28 when the corresponding inputs of logic elements 18-25 are present (Fig. 2.6). So, at the first input of the logical element 2 And-2 And-2 OR 22 and the first input e of the logical element 2 OR-2 SHI-2 AND 24 control impulses THJIIICT.OPOB 2 and 5 receive control pulses synchronized across the phase voltage of the network U, (Fig. 2, c). When unlocking the thyristors 2 and 5, the current simultaneously flows in three phases of the electric motor 1. The thyristors are switched on in other intervals d- in a similar way. In this case, in the phases of the stator winding of the electric motor 1, a three-phase system of voltages of both "and" U frequency f is formed.

Thus, when the electric motor 1 operates at a lower frequency f on parts of the output voltage curve d ,, d ,, djH dj, there are practically no two-phase switching modes that are realized regardless of the angle o (unlocking the thyristors 2–9, which makes it possible to increase energy electric drive performance with a wide range of voltage regulation of the motor power supply and frequency of its rotation.

Claims (1)

Invention Formula An AC drive containing an asynchronous three-phase electric motor, two pairs of anti-parallel connected thyristors, the first outputs of which are intended to be connected to the corresponding two terminals of the power supply network, and the second terminals of the specified pairs of anti-parallel connected thyristors are connected respectively to the first and second stators of the stator winding the motor, the third terminal of which is intended to be connected to the third power supply terminal, the synchronization pulse shaper, Which are designed to be connected to the power supply terminals, and the output of the synchronizing pulse driver is connected to the first input of the modulating voltage generator, the second input of which is intended to provide a frequency setting signal, four logic elements 211, the outputs of which are connected to the inputs of the corresponding four amplifiers , characterized in that, in order to increase the energy indices, a third and a fourth pair of anti-parallel connected thyristors are introduced into it, two phase-shifting units, two lo elementary elements 2 I-2 I-2 IL two logical elements 2 OR-2 llTui- 2 I, fifth, sixth, seventh and eighth amplifiers, and a modulating voltage generator is designed as a series-connected integer frequency divider and six-channel pulse distributor, the first inputs of phase-shifting units are designed to be connected to the corresponding first and second power supply terminals, the second inputs of phase-shifting units are combined and intended to provide a voltage command signal, the first output of the six-channel pulse distributor is connected to the first inputs of the first logic elements 2 I-2 I-2 OR and 2 OR-2 OR-2 I, sec The second code of the six-channel pulse distributor is connected to the second input of the first logical element 2 OR-2 OR-2 AND and to the first input of the first logic element 2 And, the third output of the six-channel pulse distributor is connected to the first inputs of the second logical element 2 And-2 And-2 OR and the second logic element 2 AND, the fourth output of the six-pulse pulse distributor is connected to the second input of the second logical element 2 AND-2 AND-2 OR and to the first input of the second logical element 2 OR-2 OR 2 AND, the fifth output of the six-channel parallel the pulse limiter is connected to the first input of the third logical element 2 AND and the second input of the second logical element 2 OR-2 IPI-2 AND, the sixth video channel of the six-channel pulse distributor is connected to the second input of the first logical element 2 AND-: 2 AND-2 OR and the first input of the fourth logical element 2 And, i the first output of the first phase-shifting unit is connected to the third input of the first logic element 2 And-2 AND-2 OR and the second input of the fourth logical element 2 And, the second output of the first phase-shifting unit is connected to t Another input of the second logical element 2 AND-2 AND 72 OR with the second input of the second logical element 2 AND, the first output of the second phase-shifting unit is connected to the fourth input of the first logical element 2 AND-2 AND-2 OR, with the second input of the first logical element 2 AND and with the third and fourth inputs of the first logic element 2 OR-2 OR-2 AND, the second output of the second phase-shifting unit is connected to the second input of the third logic element 2 AND, with the fourth call of the second logic-14) element 2 AND-2 OR and the third and fourth inputs of the second logic element 2 OR-2 OR-2 K, the outputs of the first and second logic elements 2 I-2 I-2 OR and the first and second logical elements 2 OR- 2 OR-2 and are connected to the inputs of the fifth, sixth, seventh and eighth amplifiers, respectively; the first terminals of the third and fourth pairs of anti-parallel connected thyristors are connected respectively to the first and second terminals of the stator winding of the electric motor, the third one of which is connected to sec E terminals of the third and fourth pairs of antiparallel-connected thyristors, the outputs Fifth and six-pole amplifiers are connected; with the control circuits of the first-connected thyristors of the first pair, the outputs of the seventh and eighth amplifiers are connected to the control circuits of the counter-parallel connected thyristors of the second pair, the outputs of the first and third amplifiers are connected to the control circuits of the opposite-connected thyristors the third pair, the outputs of the second and fourth amplifiers are connected to the control circuits of the fourth pair of anti-parallel connected thyristors, the first and second inputs of the modulating voltage generator are formed The first and second inputs of the integer frequency divider, respectively.