SU1510065A1 - Frequency divider by two - Google Patents

Abstract

The invention relates to radio engineering and can be used in the construction of frequency synthesizers. The purpose of the invention is to reduce nonlinear distortion. The divider contains a single-band amplitude modulator 1, a high-frequency generator 2, an amplifier 3, an adder 4, a multiplier 6, a low-pass filter 7 and an amplitude limiter 8. To achieve the goal, an amplitude detector 5, a differentiating circuit 9 and a trigger 10 are entered. At the inputs of the adder 4 signals from generator 2 and from modulator 1 are fed through multiplier 3. The output signal of adder 4 is the product of two harmonic oscillations, one of which is the required voltage with a divided oscillation frequency. At the output of the detector 5, a signal of only one sign is formed, consisting of half the periods of the divided oscillation frequency. This signal is fed to the inputs of the limiter 8 and multiplier 6. At the output of the multiplier, a harmonic oscillation of the divided frequency with a low content of higher harmonic oscillations is formed. Filter 7 eliminates the higher harmonic oscillations in the output signal. 2 Il.

Description

About SP

1

The invention relates to radio engineering and can be used in the construction of frequency synthesizers.

The purpose of the invention is to reduce non-linear distortion.

FIG. 1 shows a frequency divider by two; in fig. 2 - schematic multiplier circuit.

The frequency divider into two contains a single-band amplitude modulator (DAM) 1, a high-frequency oscillator 2, an amplifier 3, an adder 4, an amplitude detector 5, a multiplier 6, a low-pass filter 7, an amplitude limiter 8, a differentiating circuit 9 and a trigger 10.

. The multiplier 6 contains an operational amplifier 11 and a transistor 12

The frequency divider for two works as follows. The output signal and the high-frequency generator 2 signal are fed to two CAM 1 inputs. The signal from the CAM through the amplifier 3 is fed to the first input of the adder 4, to the other input of the adder 4 a signal is output from the output of the high frequency generator 2.

The inputs of the adder 4 are fed from the high frequency generator 2 and from the CAM 1 through the amplifier 3, and the output signal of the adder 4 is the product of two harmonic oscillations, one of which is the required voltage with a divided oscillation frequency.

The signal from the output of the adder 4 is fed to the input of the amplitude detector 5, the output of which produces a signal of only one sign, consisting of half the periods of the divided oscillation frequency.

This signal is fed to the inputs of the amplitude limiter 8 and the multiplier 6.

The limiter 8 generates square-wave pulses that are differentiated by the differentiating circuit 9 and are fed to the input of the trigger 10, which forms a signal controlling the operation of the multiplier 6.

Transistor 12, which is part of multiplier 6 (Fig. 2), operates in a key mode and closes the non-inverting input of operational amplifier 11 to ground through one period of the signal existing on the transistor of amplitude detector 5. As a result, a harmonic oscillation is generated at the output of multiplier 6 divided frequency with a low content of higher harmonic oscillations.

The low pass filter 7 eliminates the higher harmonic oscillations in the output signal.

Claims (1)

Invention Formula A frequency divider into two, containing a single-band amplitude modulator connected in series, an amplifier and an adder, a high-frequency generator whose output is connected to the first input of a single-band amplitude 1 multiplier and to the second input cyMMaj; opa, the amplitude limiter, and the series-connected multiplier and filter the second input of the single-band amplitude modulator is a signal input of a frequency divider by two, characterized in that, in order to reduce non-linear distortions, amplitude detector connected in series differentiating. circuit and trigger, the output of which is connected to another input of the multiplier, while the input of the limiter is connected to the output of the amplitude detector, whose input is connected to the output of the adder, the output of the amplitude limiter is connected to the input of the differentiating circuit. From 5l. five From 6l. ten / Editor G. Gerber Compiled by A.Soloviev Tehred M. MorgenteL - Proofreader S. Iekmar Order 5828/55 Circulation 884 VNISh of the State Committee on Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, 4/5, Raushsk nab. Production and Publishing Combine Patent, Uzhgorod, st. Gagarin, 101 MUD7 Out FIG. 2 Subscription