SU1509903A1 - Arbitrary modulo folding device - Google Patents

Abstract

The invention relates to automation and computing and can be used in devices operating in the system of residual classes. The purpose of the invention is to increase the speed of the device. The initial number X is fed to the inputs of the first operand of the subtractors of group 2 from the information input 1 of the device. The inputs of the second operands of the subtractors of group 2 receive constants that are multiples of the module M. With the help of comparison blocks of groups 5 and 6 and elements AND of groups 8 and 9, a subtractor of group 2 is determined, the output code satisfies two conditions: α _to ≥0 and α _to ≤M -1. In this case, the corresponding OR element of group 10 passes this code through the corresponding switch of group 4 and the elements of OR group 11 to the input of register 12, from the output of which this code goes to output 13 of the device. Thus, the computation time of the remainder is reduced to the computation time of the difference on the subtracters of group 2 and comparing these results with zero and the / M-1 code. 1 il.

Description

The invention relates to automation and computing and can be used in devices that function in a system of residual classes.

The purpose of the invention is to increase the speed of the device.

In drawing drawing functional circuit device.

The device has information input 1, a group of 2 subtractors, a group of 3 inputs for setting subtractors, a group of 4 switches., Groups 5, 6 comparison blocks, input 7 specifying a module code, groups 8, 9 elements AND, groups 10, t1 elements OR, register 12 and information output 13,

The device works as follows.

The information input 1 of the device is supplied with the initial number X lying in the range O X M, which is fed to the inputs of the first operand of all the subtractors of group 2, to the inputs of the second operands of the evaluators of group 2 from group 3 of the device's inputs I receive constants multiple of modgao (0, m2m, ,,. nm, where n is determined from the hyphenation

p, o („hell (modm). From the outputs

The gruppa 2 subtractors oi, X-km are fed to the information inputs of the switches of group 4 and to the first information inputs of the comparison unit of the first group 5, to the second information inputs of which input 7 sets the device module code, t is 1 ). To the first information inputs of the comparison units of the second group 6, the outputs of the sign bits of the corresponding subtractors of group 2 are supplied. To the second information inputs of the comparison units of the group 6, a zero potential bus of the device is connected (not shown). These comparison units form a single signal at their outputs when

the result at the outputs of the subtractors pn 2 is non-negative () (0).

Comparison units of the first group 5 compare the results of the subtraction of the subtractors of group 2 with the code t-1, coming from the input 7 of the device, B

tea for o {| With t-1 and cij, t-1, a single signal appears at the corresponding output of the comparison unit. If there is a single signal on

55

0

0

five

output of the matching unit of comparison group 6j, a single signal from the output of the element AND of group 8 or 9 passes through the corresponding element OR of group 10 to the control unit input of the corresponding switch of group 4. As a result, the code from the output of the subtractors of group 2, from which the result of the calculations satisfies two conditions : O.- O and $ t-1, through the elements of OR group 11 is written to register 12, This code is the control residue modulo m.

Consider the operation of the device using the example for -X 100 and m 29. In this case, the codes 0,29j 58 ,,, are received at the input of the third device 3, the codes are formed at the outputs of the subtractors of group 2:

0.29,100 (oio 0);

1.29

2.29

3.29

4.29

Oi5 6i4

100 100 100 100 100

 sixteen

71 (oi, 0) j 42 (); 13 (oi3 0)

(0)

and

t, d,

that

Since O and 8, from output A B of the third unit of comparison of group 5 through the third element AND of group 9, a single signal passes through the third element OR of group 10 and opens the third switch of group 4,

As a result, code 13 appears on register 12 (through the group of elements OR 11) and is posted to output 13 of the device.

Code 13 is 100 modulo 29,

convolution number

Claims (1)

Invention Formula A device for convolution according to an arbitrary modulus, containing a register and two groups of AND elements, so that, in order to improve the speed of the device, a group of subtractors, rpjmna of which is prepared, 6 groups of elements OR, two The units of the first operand of the group’s vychitel are connected to the information input of the device, the inputs of the second operand of the group’s vychitel are connected to the corresponding inputs of the setting of the device subtraction constants; Dineny with information inputs of the corresponding switches of the group and the first information inputs of the respective comparison blocks of the first group, the second information inputs of which are connected to the input of the device module code, the outputs of the digits of the sign of the subtractors of the group of the second group, the second information the inputs of which are connected to the bus of zero potential of the device, the outputs Equals and Less of comparison blocks of the first group are connected according to with the first inputs of the corresponding 15 09903 elements of the first and second groups, the outputs of which are connected to the inputs of the corresponding elements OR of the first group, the outputs of which are connected to the control inputs of the corresponding switches of the group, the outputs of which are connected to the inputs of the corresponding elements OR of the second group, the outputs of which are connected to the corresponding bits of the information input the register, the output of which is the information output of the device, the outputs are Larger or Equal to the comparison blocks of the second group are connected to the second inputs of the corresponding skinny elements s and the first and second groups. ten