SU1508175A1 - Digital phasemeter - Google Patents

Abstract

This invention relates to digital measurement technology and is intended to measure the instantaneous values of the phase difference between low frequency alternating current signals. The aim of the invention is to improve the accuracy of measuring the phase shift in a wide range of amplitudes of input signals. The digital phase meter contains two limiting amplifiers, two drivers, two voltage-to-frequency converters, a time block selection unit, keys, two counters, a subtractor, an indicator device, and a control pulse driver. The introduction of new elements and connections leads to a significant reduction in the error component due to a change in the amplitudes of the input signals. 2 Il.

Description

This invention relates to a digital measuring technique and is intended to measure instantaneous values of the phase difference between low frequency alternating current signals.

The purpose of the invention is to improve the accuracy of measurement (no phase shift in a wide range of amplitudes of input signals.

Figure 1 shows the block diagram of a digital phase meter; FIG. 2 shows timing diagrams explaining his work.

The digital phase meter contains the first amplifier-limiter 1 and the driver 2, the second amplifier-limiter 3 and the driver 4, the first and second voltage-to-frequency converters 5 and 6, the timing block 7, the first and second keys 8, 9, the first and second

counters 10, 11 ,, subtractive device 12, indicator device 13, shaper 14 s correct. Of the common pulses. The inputs of the limiting amplifiers 1 and 3 are connected to the input buses 15 and 16, the outputs to the inputs of the formers -2 and 4, respectively, of the voltage and frequency converters 5 and 6, the inputs of the time interval allocator 7 are connected to the outputs of the formers 2 and 4 In the output, to the control inputs of the keys 8 and 9, through which the outputs of the voltage to frequency converters 5 and 6 are connected to the counting inputs of the counters 10 and II, respectively. The outputs of the counters 10 and 11 are connected to the corresponding inputs of the subtracting device 12, the output of which is connected to the information input of the indicator device 13, the gate input indicator

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the device 13 is connected to the first output of the driver control pulse generator 14, its second output is connected to the inputs of the initial installation of the counters 10 and 11, the input of the driver control pulse 1D is connected to the output of the time interval selection block 7

Signals of the same frequency are fed to the inputs of limiting amplifiers 1 and 2, which, having a certain limiting threshold, convert them into pulses of various shapes depending on the amplitude of the input signals. If the amplitude of the signals is much larger than the threshold of the amplifier - limiter, then the pulses at its output have a shape that is close to rectangular. If the amplitude of the input signal is commensurate with the threshold level of the limiting amplifiers 1 and 3, then the shape of the output pulses having oblique edges is different from the rectangular one. These pulses control the operation of voltage-to-frequency converters 5 and 6, which generate pulse sequences with frequencies varying according to the shape of these pulses. A time interval block 7 controlled by a driver 2. and 4 pulses, produces a signal whose duration is equal to the time interval between the transition moments of the input signals of the lower and upper limitation thresholds, including directly the duration of these transitions. The keys 8 and 9 are opened for a time equal to the duration of the control signal generated by the time interval allocating unit 7 and pass pulses from the outputs of the corresponding voltage to frequency converters 5 and 6 to the inputs of the enum counters 11 and 11. The difference between the numbers of pulses counted by the counters 10 and 11, proportional to the phase shift between the signals, is calculated by the subtractor 12 and is transmitted to the indicator device 13 by the signal from the first output of the driver 14, at the beginning of the cycle Measurement of the counters 0 and 11 are set to zero by a signal arriving at the inputs of the initial installation of the counters 10, 11 from the second output of the driver 14 of the control pulses.

The operation of the digital phase meter is illustrated by time diagrams in FIG. 2, where: on the plots q, 5 there are pulses at the outputs of limiting amplifiers 1 and 3, which have input signals of different amplitude, at the plots b and l, respectively, at the outputs of converters 5 , 6 voltages per frequency, frequency variations of which are proportional to voltage variations at the outputs of limiting amplifiers 1, 3j on plot A are the control signal at the output of the block 7 in the time interval; in plots 6,) K - dependence of the frequency of the pulses arriving at the inputs of the counters 10, 11, on time, while the area of the shaded figures corresponds to the number of pulses counted by each of the counters 10; 11; on plots. ,, rectangular shapes. The areas of which are the areas of the corresponding figures presented on e and k; on the plot K is a figure, the square is equal to the difference of the areas of the figures represented in epures and U, and is proportional to the time interval between the moments of transition of input signals through a zero value, i.e. phase shift between signals; on plot L, the signal at the second output, the driver 14 of the control pulses, which is used to reset the counters 10, 11 to zero; in the 2 M plot, the signal at the first output of the driver of 14 control pulses, through which the measurement result is transmitted to the indicator device 13,

The introduction of new elements and connections leads to a significant reduction in the error component due to a change in input amplitudes. signals. For example, if at one of the inputs of a known digital phase meter with a limiting threshold of amplifiers 0.001 V, the signal amplitude decreases to O, 002.B, then the measurement error of the phase difference will be approximately 30 i.e. The device becomes practically inoperative. Under the same conditions, the proposed digital phase meter retains the established measurement accuracy,

. In addition, this digital phase meter provides a reduction in the labor intensity of the measurement process, since 5 .J5

There is no need to constantly equalize the amplitudes of the input signals to ensure accurate measurement of the phase shift between signals whose amplitude varies over a wide range. The proposed phase meter automates the measurement process, i.e. to obtain the exact value of the phase shift of signals whose amplitude varies over a wide range, without pre-tuning it.

Claims (1)

Invention Formula A digital phase meter containing a time block selection unit, one input of which through the first driver is connected to the output of the first limiting amplifier, another input through the second driver connected to the output of the second amplifier limiting amplifier connected to the input buses, the output of the allocation unit the time interval is connected to the control input of the first key, the output of which. Coming in with the counting input of the first counter, characterized in that, in order to improve the accuracy of measuring the phase shift in a wide range 756 In terms of changing the amplitudes of the input signals, two voltage-to-frequency converters are entered into it, a second switch, a second counter, a subtractor, an indicator device, and a driver for controlling pulses, the first output of which is connected to the output input of the indicator device, and the second output to the initial input The settings of the first and second counters, the outputs of the limiting amplifiers are connected respectively to the inputs of the first and second voltage to frequency converters, the outputs of which are connected to the information and the inputs of the first and second keys ,, the output of the second key is connected to the counting input of the second counter, the output of the time slot allocation unit is connected to the control input of the second key and to the input of the control pulse generator, the second output of which is connected to the inputs of the initial installation of the First and second counters whose outputs are connected to. the corresponding inputs of the subtracting device, the output of the subtractive device is connected to the format of a tone input of the indicator device, jigl