SU1504764A1 - Device for controlling d.c. to three-phase voltage converter - Google Patents

Abstract

The invention relates to converter technology and can be used in the construction of sources of secondary power supply of a centralized type. The purpose of the invention is to improve the energy performance of the converter and simplification. The device for controlling the converter contains a frequency adjuster 1, a twelve-channel distributor of 3 pulses, a pulse width modulator 4 connected to three similarly made control signal generating units 19-21. Three YK-flip-flops 16-18 and a divider 2 frequencies are connected to the output of the setpoint 1 frequency. The device provides control of a DC / DC converter. Voltage regulation is performed by the partial pulse-width regulation method, but without the inherent complexity of the known power section of the converter. 3 il.

Description

9

ate

h |

Od 4

fm, /

tt t .f tt i

Hatfaifm hes a

The invention relates to a conversion technique and can be used in the construction of centralized secondary power supply sources with a sinusoidal JB controlled or stabilized specific output output voltage range.

The aim of the invention is to improve the energy performance of the converter and to simplify the nodes of the formation of control signals.

FIG. 1 shows the principal 2, or NOT 29, 30 and one element 2IL11

31. The channel of node 19, designed to form a equalizing signal-5 Md (M; (g). -Contains elements 23 (24) and ZI 27 (28)); defined by the logical expression M,

 -.- p1

 S, I) 5, S-Q ,, 5, i (Mftj). To generate a control signal M

J5

Two elements 2I 25, 26 are used and element 2ILI 31, connected in such a way to the circuit of the device for controlling the 15 output of the latter, will be a format-converter, in FIG. 2 - the signal defined by the logical power unit of the converter is schematized, in the expression TL Q iQ and. FIG. 3 - timing diagrams, from c-D forming the control signaling principle of operation of the device for N () use the additional control of the converter, and form 20 element 2OR-NOT 29 (30) to the inputs of which the output voltage of the converter. connected outputs of the element ZI

The control device (fig. 1) 27 (28) and element 2И 26 (25), on the inverter of constant voltage (° F) element 2 OR-NO 29 (30) will not be in three phase (the power part of which is RI. This formed the signal MD1 M; I, + pogo shown in Fig. 2) includes 25 + QtQn (A4 L QaQi) —the frequency adjuster J, connected to the other node 20, 21 formed to the divider 2 frequencies by two, you The control signals are carried out which is connected to the counting one in the same way, taking into account the phase shift of the twelve channel distribution input of 27 g / 3 signals from the outputs of the converter of 3 pulses with pairs aphasic extractor 30 limiter 3 pulses and triggers moves Q, 0, Q2, .Q ,, ..., Q,, 5 16-18, In general, logical expressions Dispenser 3 pulses can be executed, for example, twelve 1 -K-flip-flops 4-15 (fig. 1 show only four 1-K-flip-flops 4, 35 5 and 14.15) with a cross-link. The structure of the device also includes three additional 1-K-flip-flops 16-18, the counting inputs of which are combined and connected to the output of the setpoint of 1 frequency-40th. The installation I- and K-inputs of the trigger 16-18 are connected to the corresponding outputs of the twelve-channel distributor of 3 pulses so that I, Q4. K, 1g P9 KV Qg,

The wives that define the connections in each of them can be represented as.

M ;, ,, SQ -, - Q; +11,

J1 ji

Mj.- Q

Mpi

(+ 0

I 3 Q ,, Kj Q ,, a outputs D, D, .., D3, D. J of the flip-flops 16-18 are connected to the inputs of three similarly executed nodes 19-21 of the formation of control signals M ,, M.2, Mj , Mi, Mj.K to the remaining inputs of nodes 19-21, the corresponding outputs T.-K-flip-flops 4-15 of the distributor 3 pulses and the output S of the modulator 22 pulse width are connected. The latter can be more fully autonomous or synchronized from the setpoint 1 frequency. Each node 19-21 contains two eleMj3 DmDm., SQiQHii. M, Mj., - f Q, 4, Q, 4,., Mjs Q ;, Qi ,, Qi.i Qi ,,,.

.For phase A (j A) the indices m and i PiBHbi „For phase B m 3, a i 9. For phase C m 5, i 17, It follows

45 to take into account that if the resulting index of the signal Q is more than twelve (the number of 1-K-flip-flops 4-15 of the distributor 3 pulses) or the signal D is more than three (the number of additional 1-K-flip-flops 16-18), then

its value will be equal to the resulting minus, respectively, 12 or 3, or with simultaneous inversion of this signal. Outputs Kj ,, M j ,, Mj,,

The Mj4, Mjj of the nodes 19-21 are connected via the amplifying-decoupling node 32 with the control inputs of the corresponding keys of the power section of the ZI-NE converter 23.24, 2I 25.26, ZI 27.28, the switch shown in FIG. 2 ,

2OR-NOT 29, 30 and one element 2IL11

31. The channel of node 19, designed to form the equalizing signal Md (M; (g). -Contains elements 23 (24) and ZI 27 (28) in series) and, at the output of the latter, a signal will be generated expressed by the logical expression M,

 -.- p1

 S, I) 5, S-Q ,, 5, i (Mftj). To generate a control signal M

J5

Two elements 2I 25, 26 are used and element 2IL 31, connected in such a way, the output of the latter will be formed by a signal defined by the logical expression TL Q iQ and. The control signal-N (() is used to form-additionally the element 2IL-NOT 29 (30) to the inputs of which the outputs of the ZI element are connected.

27 (28) and element 2I 26 (25), At v ° f of element 2 OR-NO 29 (30) there will be RI. This is the signal MD1 M; I + QtQn (A4 L QaQi) - the other node 20, 21 The control signals are executed similarly, taking into account the phase sf in 27g / 3 signals from the outputs of the limiter 3 pulses and triggers 16-18, In general, the logical formulas

The wives that define the connections in each of them can be represented as.

(28) and element 2И 26 (25 f element 2 OR-NOT 29 (3 AND. This generates a signal QtQn (A4 ъ QaQi) - other node 20, 21 nor control signals similarly, taking into account the phases 27g / 3 signals with a separator 3 pulses and -18. In general, it is logical.

M ;, ,, SQ -, - Q; +11,

J1 ji

Mj.- Q

Mpi

(+ 0

27 (28) and element 2И 26 (25), At v ° f of element 2 OR-NOT 29 (30) there will be RI. This is the signal Md1 M; I, + + QtQn (A4 Lb QaQi) - other node 20, 21 the formation of control signals is performed similarly, taking into account the phase SD of 27g / 3 signals from the outputs of the distributor 3 pulses and triggers 16-18, In general, the logical expressions

Mj3 DmDm., SQiQHii. M, Mj., - f Q, 4, Q, 4,., Mjs Q ;, Qi ,, Qi.i Qi ,,,.

.For phase A (j A) the indices m and i PiBHbi „For phase B m 3, a i 9. For phase C m 5, i 17, It follows

Consider that if the resulting signal index Q is more than twelve (the number of 1-K-flip-flops 4-15 of the distributor 3 pulses) or the signal D is more than three (the number of additional 1-K-flip-flops 16-18), then

its value will be equal to the resulting minus, respectively, 12 or 3, or with simultaneous inversion of this signal. Outputs Kj ,, M j ,, Mj,,

The Mj4, Mjj of the nodes 19-21 are connected via the amplifying-decoupling node 32 to the control inputs of the corresponding switches of the power section of the converter of the constant voltage to three-phase (Fig. 2), which are controlled by the proposed device, three single-phase inverter cells 33-35, made in the form of two racks of keys 36-47, and the keys 36-41, connected to the first (for example, positive) bus 48 of the converter, are made in the form of fully controllable AC keys, and adjacent to them Keys 42-47 racks - in vision counter-parallel connected, for example, a transistor and a diode. The midpoints of the racks of the keys 36-47 of each inverter cell 33-35 are connected to the ends of the primary winding 49-51 of the corresponding output transformer 52-54, and the midpoints of the said windings 49-51 are connected via keys 55-57 (made Like keys 42-47, in a vvde anti-parallel-connected transistor and a diode) to the first bus 48 of the inverter. Secondary windings of 58-60 transformers 52-54 are connected in a star

The principle of operation of the converter control device is explained in the timing diagrams shown in FIG. 3

Frequency reference 1 synchronizes the operation of the device. The pulses of the form and, from its output, are fed to the input of divider 2 frequencies, and also determine the frequency of operation of the modulator 22 of the pulse width. The pulses Uj arrive at the counting input of the distributor 3 pulses. The phase shift between the sequences of symmetric rectangular pulses Q is t / 12. Each of the flip-flops 16-18 is synchronized with a corresponding signal from the output of the distributor of 3 pulses, and their counting inputs receive a sequence of ir pulses U. As a result, the high signals and 4-Ufj are shifted by an angle Jr / 24 relative to the signals Q , Q, Q, respectively. Dp to provide adjustment of the output voltage of the converter in accordance with the signal and the duration L of the signal S at the output of the pulse width torus 22 varies. This signal as well as signals from the outputs of the distributor 3 pulses and triggers 16-18 are fed to the inputs of three nodes 19-2

from 5 0 5

0

H 0

five

0

generating the control signals by the stubs 36-47 and 55-57 of the converter. After performing logical operations on the pulse sequences at the outputs of the elements 27-31, new sequences of control pulses (signals) will be obtained, defined by the above logical expressions. The number of each element 23-31 at node 19 corresponds to the index of the resulting pulse sequence, some of which are shown in FIG. 3. As a result, the keys 36-47 and 55-57 of the converter are switched in accordance with the developed algorithm. Adjusting pauses L and additional pulses are introduced at the predetermined conduction interval of the keys 36-47. At a symmetrical load of the converter connected to a star without a neutral wire, the phase voltage on the load (at the corresponding adjustment pause L) will look like U (cm .fig, 3).

Thus, the given converter allows to provide regulation of its output voltage in a certain range.

Form and invention

A device for controlling a DC to three-phase voltage converter, including three single-phase inverter cells with a transformer output, each of which is made in the form of two key racks with control inputs My ,, M d, Mj3 Mu, where j A, B, C phase indices, moreover, keys with control inputs md and m; connected to the first power bus of the converter, made in the form of fully adjustable AC keys, and keys with control inputs M y and K JJ connected to the second power supply, in the form of counter-parallel connected transistor and a diode, midpoints of racks the keys are connected to the ends of the primary winding of the transformer, the midpoint of this winding is connected via a key with the control input Myj-, also made in the form of an anti-parallel connected transistor and a diode, connected to the first power line of the converter, containing its frequency adjuster, twelve-channel pulse distributor with paraphase outputs Q, Q, Q, Q,., .., Q ,, Q, which are connected to the inputs of three control signals that are similar to those made, the outputs M;, M., .. ,, M: these nodes are intended to be connected to the corresponding control inputs of the above-mentioned converter keys, with a pulse width modulator and an output connected to one of the inputs of the control signal generation nodes connected to the frequency setting unit, in order to improve This indicator is simplified and equipped with a frequency divider and three 1-K-triggers, the counting inputs of which are combined and connected to the output of the frequency knob, the setting I and K inputs are connected to the outputs of the two-channel pulse distributor, so that I,, K, Q,

counting input twelve channel ra

pulse limiter connected to

4 Ufl 3

OUTPUT frequency divider, the input of which is connected to the output of the frequency adjuster, the corresponding paraphase outputs 1-K-flip-flops D, | , D, .. , D, D., are connected to the inputs of the control signal generation units, and the relationship between them is determined by the following logical expressions:

I

m.

m

Ji

DmD., SQiQ, -, ..,

Mj, + Qj ,, Q;. ,, -,

M, 3., SQ; Q,. ,, /,

M ;, Mj3 + Q;., Qi.io.

M

15

 Q, 4iQi, o + Q, - iQi, where i 1 (9,17) and m, 5) respectively for j A (5,0), moreover,

. if the resulting index with Q is more than two above or with D more than three, then its value is equal to the resulting minus 12 or 3, respectively

inverting this output signal

J SS

Phie. Z

Compiled by 0. Parfenova Editor A. Makovska Tehred M. Khodanych

Corrector B, Cabs

Order 5263/54

Circulation 647

VNIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, Raushsk nab. 4/5

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Claims (2)

Claim A device for controlling a DC-to-three-phase converter, including three single-phase inverter cells with a transformer output, each of which is made in the form of two key racks with control inputs Mu ,, M M ^ s, where z "A, B, C are phase indices, wherein the keys to the control inputs Μ, · and M ₄ connected to the first converter power bus, formed as a fully controllable AC keys, and keys to control inputs and K are connected to the second power line, - a counter-parallel a transistor and a diode, the middle points of the key racks are connected to the ends of the transformer primary winding, the middle point of this winding through a key with a control input, also made in the form of an in-parallel connected transistor and a diode, is connected to the first converter power bus, which contains a frequency adjuster, a twelve-channel distributor pulses with paraffin outputs Р »Р,, Р ^, Рг> ····» Р <ι * Рп 'which are connected to the inputs of three similarly executed nodes for the formation of control signals, outputs Mu, M of these nodes are designed to connect to the corresponding control inputs of the aforementioned converter keys, and a pulse width modulator connected to the output of the frequency adjuster by an output connected to one of the inputs of the control signal generation nodes, characterized in that, in order to improve the energy performance of the converter and simplify it, equipped with a frequency divider and three Ι-Κ-triggers, the counting inputs of which are combined and connected to the output of the frequency setter, the setting I- and K-inputs are connected to the output am nadtsatikanalnogo two pulses of the distributor, so that I, = ~ r _4, r ^{1 =} R 8 '= _O? , I s = C2, ₂ , K _? = p _ια , the counting input of the twelve-channel pulse distributor is connected to the output of the frequency divider, the input of which is connected to the output of the frequency adjuster, the corresponding paraphase outputs of the Ι-Κ-triggers, ϋ, GC are connected to the inputs of the nodes for generating the control signals, and the connections between them are determined the following logical expressions: = M _ 5P, P, = ⁺ P about, P; * y m .thirteen = V glm ZD; P ί + and ¹ = Ir ⁺ P; + ι P; · "- (in ' = P; ₊ ί P ί * · u ⁺ P; + ι P ί ♦ y, where ί = 1 (9, 17) and t = 1 = 3.5) respectively Respectively for = A (B, C), moreover, if the resulting index at <3 turns out to be more than twelve or at ϋ more than three, then its value is equal to the resulting minus 25 or 12, respectively, with a simultaneous inversion of this output signal.