SU1501097A1 - Logarithmic a-d converter - Google Patents

Abstract

The invention relates to automation and computing and can be used in devices of information-measuring and computing equipment. The purpose of the invention is to improve the accuracy and simplify the converter. This is achieved in that the converter containing the counter 7, the result register 8, the comparator 9, the exponential function generating unit 2, the one-shot 3, AND 5, the clock pulse generator 1, the HE 4 element and the delay element 6 are entered. 1 il.

Description

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The invention relates to automation and computer technology and can be used in information-measuring and computing devices.

The purpose of the invention is to improve the accuracy and simplify the device.

The drawing shows a functional diagram of a logarithmic analog-to-digital converter.

The proposed logarithmic analog-to-digital converter contains a clock pulse generator 1, an exponential function generation unit 2, a single-selector 3, a HE 4 element, an AND 5 element, a delay element 6, a counter 7, a result register 8, a comparator 9, a reference voltage source 10, the first switch P, storage capacitor 12, buffer amplifier 13, second switch 14, and voltage converter 15 — current,

Logarithmic analog-to-digital Converter works as follows.

When the power is turned on, the comparator 9 is triggered, since in the initial state the capacitor 12 is discharged and triggers the single-oscillator 3 The output switch of the single-oscillator closes the first switch 11, through which the storage capacitor 12 is charged to the level of the reference voltage U. 4 the pulse of the generator 1 to the counter 7; the pulse of the one-shot Torah delayed by the element 6 delayed the counter 7; After the end of the pulse of the one-cycle 3, the switch 11 is opened and the second emitter of the element 5 is fed with the element NOT 4 logical unit, allowing the generator 1 pulses to pass through the element AND 5 to the counting input of counter 7 and the control key of the second key 1.4 o With each pulse, the generator and 1 closes the key 14, connecting the output of the voltage converter 15 to a storage capacitor 2 The capacitor 12 is discharged by the current of the converter 15 for a period of time equal to the pulse width of the generator I. In the pause between the pulses of the generator 1, the capacitor 12 retains its charge, since the key 14 is open. Consequently, with each impulse of the generator I, which passed through the element And 5, the voltage on

condenser 12 decreases. When it becomes equal to the input voltage (the voltage transfer ratio of the buffer amplifier is equal to one), the comparator 9 triggers, The output pulse of the comparator 9 rewrites the conversion result from counter 7 to register 8, where this result is stored until the next clock pulse, and starts the single-oscillator 3 The following described conversion process is repeated. The result of the conversion is equal to the number of pulses n of the generator I arriving at the counter 7 during the time from the end of the pulse of the one-shot 3 to the actuation of the comparator 9:

Where

n --I-, log -H. log Uo

(I)

Kt

d n + ----) 2C 2C

 {

k is the conversion factor of the voltage-to-current converter 15;

t is the pulse duration of the generator 1 clock pulses; With the capacity of the storage capacitor 12C,

The existence of the logarithmic relationship (1) can be explained as follows Before the conversion, the storage capacitor 12 is charged to the level of the reference voltage and, After the first pulse of the generator 1 arrives at the key 14, the voltage on the capacitor 12 decreases and becomes

 Uf 0 --1- (and, + and „), (2)

 those. and, and,

After the second impulse of the generator 1, received on the capacitor 14, the voltage on the capacitor 12

and and, - -11- (,), (3)

l

Tovs Uj Up.

Similarly, after the p-th pulse of the generator 1 received on the key 14, the voltage on the storage capacitor 12 becomes equal to

Un - U, f. (4)

Consequently, the number of operating keys 14, equal to the number of pulses

The generator 1, which entered the counter 7 during the time from the end of the pulse of the one-shot 3 to the triggering of the comparator 9, is proportional to the logarithm of the input voltage and.,.

DJS

Since, in the proposed device, the operation of the comparator occurs synchronously with the pulses of the generator 1, it excludes an error due to asynchronism. Moreover, in the proposed converter, the conversion characteristic is logarithmic in the entire range, as a result of which the approximation error is excluded.

Claims (1)

Invention Formula A logarithmic analog-to-digital converter containing a counter, a result register, a comparator connected by the first input to the information input of the converter, and a second input connected to the code of the exponential function generator connected to the trigger input to the output of the odiovibrator, and a clock input connected to the output of the And element, the first the input of which is connected to the output of the clock and myc generator, the exponential function generating unit contains a series-connected buffer amplifier and a converter ovatel voltage - current source and the reference voltage, the output of which through the serially connected first and second switches connected to the output of the converter voltage - current common terminal of the first and second keys by the storage capacitor is connected to the zero-potential bus, and the control input of the first switch is connected to the start input of the formation unit of the exponential function, which is In order to improve accuracy and simplify, an NOT element and a delay element are entered into it, the one-shot output through the element is NOT connected to the second input of the AND element connected to the counter input of the counter, the zero input of which through the delay element connected to the one-shot output, and the counter output is connected to the information In the output of the result register connected to the clock input to the comparator output and the one-shot input, in the exponential function generating unit, the output of the first key is connected to the input of the buffer amplifier connected to the output of the exponential function generating unit whose clock input is connected to the control input of the second key.