SU1499447A1 - Pulser - Google Patents

Abstract

The invention relates to a pulse and measuring technique and can be used, for example, in devices for generating signals of various shapes and amplitudes, as well as in DC transformers with a core driven by a linearly varying current. The purpose of the invention is to expand the functionality by providing the generation of signals of various shapes, amplitudes, durations, pauses, fronts. The generator contains a generator of 1 unipolar rectangular pulses, controlled dividers 2, 3 frequencies, elements NOT 4, 5, elements OR 6–9, keys 12–14, source 19 reference voltages, D-trigger 10, RS-trigger 14 , the integrating amplifier 20, the driver of 11 single pulses when the power source is turned on, the bus 22 "Start", the bus 23 "Reset". The introduction of keys 15-17 and summing amplifier 17 provides for changing the parameters of the output pulses: the steepness of the rise and fall, the duration of the pulses and pauses, the polarity, the amplitude of the pulses and the value of the constant component are determined by the polarity and the values of the reference voltages in the respective source channels 19, the duration of the rectangular pulses controlling the keys (dividing coefficients of the counter-dividers) and the transfer coefficient of the summing amplifier. 2 Il.

Description

CD CO 4 4 1

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amplitudes, durations, pauses, fronts. The generator contains reiifjpaTop 1 unipolar rectangular impulses, controlled dividers 2, 3 frequencies, elements NOT 4, .5, elements OR 6–9, keys 12–14, source 19 supports of voltages, 1) -trigger 10, RS-thrggg 18, integrate1 1; in 20 amplifier, for-. Worldwide 11 single JQ pulses when power supply is turned on, bus 22 Start, bus 23 Reset. The introduction of keys 15-17 and summing amplifier 17 provides a change

the parameters of the output pulses: the slope of the rise and fall, the duration of the pulses and pauses, the polarity, the amplitude of the pulses and the value of the constant component are determined by the polarity and the values of the reference voltages in the corresponding channels of the source 19, the duration of the rectangular pulses, control keys (coefficient of division of counters-dividers) and the transfer coefficient of the summing amplifier, 2 IP.

The invention relates to a pulse and measuring technique and can be used, for example, in devices for generating signals of various shapes and amplitudes, as well as in post-current Toica transformers with a core excited by a linearly varying current,

The aim of the invention is to enhance the functionality by generating signals of various shapes, amplitudes, durations, pauses, and fronts.

The generator allows generating pulses, the amplitude and shape of which is determined by the values and polarity of the reference voltages, as well as the duration of the signals controlling the keys. In Fig. 1, a functional diagram of the pulse generator is shown; FIG. 2 are time diagrams of voltages at various points in the circuit.

The generator contains a generator of 1 monopolar stable frequency pulses, controllable counters-dividers 2 and 3 frequencies, NOT elements 4 and 5, elements OR 6-9, D-flip-flop 10, driver 11 single pulses when the device’s power supply is turned on, keys 12- 17, RS flip-flop 18, reference voltage source 19, integrating amplifier 20, summing amplifier 21, bus 22 Start, which is triggered by pulses, bus 23 Reset, output bus 24.

The generator works as follows,

At the moment the power source is switched on (not shown), a single pulse is generated at the output of the pulse generator 11, which is synchronized

five

5 o

5 Q

five

ziruet and resets counters-dividers

2 and 3 frequencies, triggers 10 and 18, and an integrated amplifier 20. After this pulse disappears, the second frequency divider 3 switches to the frequency division mode, and the first frequency divider 2 is kept in the Reset state by a logical 1 signal at the input. Setting zero (Fig. 2d) This signal is generated using the second frequency divider 3, the fourth element OR 7, the B flip-flop 10, the second element NOT 5, the second element OR 8,

When a logical 1 signal appears at the output of the second counter-divider 3 frequency, a D-flip-flop 10 is triggered and a logical O signal is set at its direct output. At the control input of the counter divider

3frequencies - the signal is logical 1, t, e, it is reset, after which the first counter-divider 2 frequency goes into the division mode. The duration of the pulses at the outputs of the counters divider is determined by their division factors.

When a logical 1 signal appears at the counting input of the D-flip-flop 10, the logical output 1 is also set at the direct output and the output of the second element NOT 5, which translates the second counter-divider 3 into the division mode. Thus, periodic rectangular pulses of various duration are formed at the outputs of counters 2 and 3.

Triangular pulses are generated using a source of reference voltage 19, switches 12-14, control 1) 1x with the appropriate signals, and an integrating amplifier 20,

The signals of the iplica points of the circuit can be used to form new signals. This is achieved using a source 19 of reference voltages with separate control of the output voltage of each channel, a summing amplifier 21, and additional switches 15-17.

In the specific case, a signal is generated (2 m, which can be used to excite the cores of the DC transformers. This signal is formed as follows, depending on the values of the reference voltages, as well as on the shape of the signals arriving at the corresponding inputs of the keys 15 and 16, at their outputs, signals of direct-carbon form (Φ | IG.2i, k) appear, which arrive at the first and second inputs of summing amplifier 21. At the third input of the amplifier, a triangular signal is output from the output of the integrator 2Q.B an amplifier five signals are summed, amplified, and its output signal is the desired shape is formed. The load it passes through the key

17, which is controlled by the RS trigger

18. Output pulse parameters: the steepness of the rise and fall, pulse duration and pauses, polarity, amplitude of the pulses and the value of the constant component (stand) are determined by the polarity and values of the reference voltages in the corresponding channels of the source 19, the duration of the rectangular pulses , control keys, (coefficients, dividing the counter-dividers) and the transfer coefficient of the summing amplifier. By adjusting these values, an independent separate change is carried out over a wide range of parameters of the generated pulses. In this case, the driver circuit remains unchanged for pulses of various shapes and polarities. In this way, a significant expansion of the functionality of the proposed generator compared to the known one is achieved.

The pulse generator can be used, for example, in DC transformers, as well as in the circuits of various automation devices.

Claims (1)

Invention Formula A pulse generator comprising a monopolar rectangular generator 0 five 0 five pulses, the first and second controlled frequency dividers, the first and second elements are NOT, the first is the fourth element OR, the first is the third key is the source of reference voltages, D-flip-flop, RS-flip-flop, integrating amplifier, single pulse generator when the source is turned on Start and Reset bus, the output of the generator of unipolar rectangular pulses is connected to the input of the first and second frequency dividers, the output of the first frequency divider is connected to the input of the first element NOT and to the control input of the third key, and The frequency divider is connected to the R-input of the D-flip-flop, the D-input of which is connected to the bus of the logical unit, and the S-input to the common bus, the output of the first element is NOT connected to the control input of the first key and the counting input of D-tr, igger whose output is connected to the input of the second element NOT and the first input of the first element OR, the output of the second element is NOT connected to the first input of the third element OR, the Start bus is connected to the S-input of the RS flip-flop, and the Reset bus is connected to the second input of the fourth element OR, the first input of which is connected to the shaper output single pulses and the second input of the first and third elements OR, and the output - with the R-input of the RS flip-flop, the inverse output of the last is connected to the second input of the second element OR, the output of the first element OR is connected to the input Setting the first frequency divider zero and the first input the second element OR, the output of which is connected to the control input of the second key, and the output of the third element OR to the input Setting the second frequency divider zero, the first inputs of the first and third keys are connected respectively to the first and second inputs of the source the reference voltage, and the key outputs - with the first and second 0 inputs of the integrating amplifier; various shapes, amplitudes, durations, pauses, fronts, it additionally 0 five 0 five respectively with the second and third inputs of the summing amplifier and the output bus, the first in the fourth - the sixth keys and the summing amplifier are entered; the first inputs of the fourth - sixth keys are connected respectively to the third summing amplifier connected to them and the fourth source outputs to the output of the integrating amplifier, the reference voltages, as well as and the control input of the sixth key Direct output RS trigger summing amplifier, and the outputs, respectively, with the second and third inputs of the summing amplifier and the output bus, the first input the summing amplifier is connected to the output of the integrating amplifier, the summing amplifier is connected to the output of the integrating amplifier, and the control input of the sixth key of the co-summing amplifier is connected to the output of the integrating amplifier, dinene with direct output of the RS flip-flop,