SU1494021A1 - Device for counting quantity of object images - Google Patents

Abstract

The invention relates to automation and computing, in particular, to devices for counting the number of images of objects in the field of view of a television sensor, and can be used for in vivo analysis of the quantitative characteristics of biological objects. The aim of the invention is to enhance the functionality of the device by image analysis. The device comprises a television sensor 1, a quantization unit 2, a memory block 3, an OR 4 element, a reversible counter 5, a block 6 for time division of pulses. By storing the image code in the memory block 3 and temporarily separating the counting signals in the block 6, the device allows analyzing the previously read image of the object. No additional video recorder is required. 5 il., 3 s.p. f-ly.

Description

(21) 4326200 / 24-24

(22) 11/06/87

(46) 07.15.89. Bksh. No. 26

(71) Experimental design bureau of fine biological engineering

(72) V.G. Commissioners

(53) 621 .374.32 (088.8)

(56) USSR Copyright Certificate 951347, cl. G 06 M 11/00, 1980.

Author's certificate of the USSR No. 610141, cl. G 06 K 9/00, 1976.

(54) DEVICE FOR ACCOUNT QUANTITY. IMAGING OBJECT

(57) The invention relates to automation and computing, in particular to devices for counting the number of images of objects in

field of view of the television sensor, and can be used for in vivo analysis of the quantitative characteristics of biological objects. The aim of the invention is to enhance the functionality of the device by image analysis. The device comprises a television sensor 1, a quantization unit 2, a memory block 3, an OR 4 element, a reversible counter 5, a block 6 for temporal separation of pulses. By memorizing the image code in the memory block 3 and temporal separation of the counting signals in block 6, the device allows analyzing the previously read image of the object. No additional video recorder is required. 5 ill., 3 3 .п. f-ly.

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WITH

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The invention relates to automation and supervisory technology, in particular to devices for counting the number of objects in the field of view of a television sensor, and can be used for in vivo analysis of the quantitative characteristics of biological objects.

The purpose of the invention is to expand the functionality of the device by image analysis.

FIG. 1 shows a block diagram of the proposed device; in fig. 2 is a block diagram of a memory block} in FIG. 3 is a block diagram of the control node; in fig. 4 shows a pulse pattern formation scheme; in fig. 5 is a block diagram of a temporal pulse separation unit.

The device comprises a television sensor 1, a quantization unit 2, a memory unit 3, an OR 4 element, a reversible counter 5, and a time division pulse unit 6.

The memory unit 3 comprises a pulse generator 7, first 8, second 9 and third 10 counters, multiplexer 11, first 12 and second 13 memory nodes, adder 14 and control node 15.

The control unit 15 comprises a pulse shaper 16, first to fourth one-shot 17-20, first 21 and second 22 triggers, AND-HE element 23, first 24, second 25 and third 26 AND elements, first 27 and second 28 NO elements.

Fsr (the device 16 performs the function of lowering the lower case (SGI) and personnel (KHZ) damping pulses and contains the comparator 29, the element NOT 30, and the element 31 delay.

The time pulse separation unit 6 comprises the first 32 and second 33 triggers, the first 34 and second 35 expanders, pulses, the third trigger 36, the first 37 and second 38 differentiating elements.

50 children read the information, for example, the fourth line of the image floor, then the information from the third line of the image floor will be read from the node 13 at the same line address. So

The device works as follows.

The video signal from the output of the television sensor 1 is fed to the input of the block 55 quantization pulse 2, in which the conversion from the interlace to the horizontal row is divided into a two-level signal — the inverts, which is necessary for the intersection pulses, the duration each algorithm counts the number of the image of which corresponds to time. razheny objects.

Menus scan images of objects.

The video signal also enters memory block 3 in order to extract horizontal and frame damping pulses from it.

From the output of the quantization unit 2, the intersection pulses go to both inputs of the memory unit 3 to record an interesting image frame. Then the block 3 of the memory is transferred from the write mode to the remainder of the lines and at its outputs appear the interception pulses that are not delayed and are delayed for the period of the horizontal spin. On

one of the inputs of the element OR 4 receives delayed intersection pulses. Unattended intersection pulses arrive at another input.

0 element OR 4 and the subtracting input of the reversible counter 5.

At the output of the OR 4 element, the addition pulses are generated, arriving at the summing input of the reversing counter 5. The difference between the number of pulses arriving at the inputs of the reversing counter 5 through the blocks 6 of the time division of them is equal to the number of objects in the recorded image frame.

Memory unit 3 operates as follows.

5 I The interesting informative image field, located in the field of view of the television sensor 1, is recorded in the memory nodes 12 and 13, and in the information node 1 3 the information is written with a shift by one to the addresses of the lines. If, for example, in node 12, the current line of the image floor is recorded in columns of the first address line,

45 then in node 13 the same information is recorded in columns of the second address bar. In the mode of reading, the shift from the addresses of the lines from nodes 12 and 13 is forbidden, so if information from the node 12 reads, for example, the fourth line of the image field, then the information from the third line of the image field will be read from node 13 at the same line address. So

55, the delay of the p-intersection pulses to the forward horizontal scan is carried out, which is necessary for the implementation of the image counting algorithm. razheny objects.

B1

Thus, the memory block 3, besides its main task, also performs the function of the delay block.

At the same time, memory block 3 remembers the informative field of object images of interest, which is very important in the case of the study of moving multi-connected objects, which can be counted only after the restoration of their single linkage (elimination of internal holes). Restoration of one-touchness requires much more time than the frame scan period, and also the immobility of objects is required. Therefore, if the frame is not memorized, it will be impossible to perform the operation of restoring the singularity of the objects, since, due to the mobility of the objects, the arrangement of the images of the objects on the target of the video sensor of the television sensor will also change.

Thus, memory unit 3 allows the device to be used for analyzing moving multi-connected objects, which expands its functionality.

The synchronous operation of the HRCSH of the memory unit 3 is performed by the control unit 15, which allocates the OIG and SGI necessary for synchronizing the operation of the memory unit 3 with the operation of the television sensor 1, and generates counting pulses for the first 8, second 9 and third 10 counters, which They are correspondingly makers of column addresses, row addresses in the operating mode, and row addresses in the regeneration mode of the memory nodes 12 and 13. The control unit 15 generates the pulses of the installation in O of the first 8 and second 9 counters, controls multiplexer 11 for multiplexing column addresses, row addresses in the operating mode and row addresses in the regeneration mode, controls shaping the row addresses in the operating mode on the adder 14 in the mode recording information, and also generates the necessary signals to control the operation of nodes 12 and 13 and sets the recording mode or the readings of the memory block 3.

The control unit 15 forms the following with i and al:

0

0

five

CAS strobe column addresses (output 6);

RAS strobe address lines (output 7);

WR / PD write-read signal (output 5) j

installation signals in the first 8 and second 9 counters (outputs 1 and 3).,

counting pulses of the first 8, second 9 and third 10 counters (outputs 3,4 and j);

control signals for multiplexer 11 (outputs 8 and 9);

signal from the input nepeiio-5 of the adder 14 (output J0).

The control unit 13 operates as follows.

In recording mode, the Write-open switch is open. In this case, the output element 27 is formed a negative signal level WR recording.

Work begins with the arrival of the OIG, which by the leading edge resets the counter of the 9 day address.

During the active negative and pulses of the GIS, the regeneration cycle of nodes 12 and 13 goes. The leading edge of the GIS sets counter 9 into the next state, causing triggers 21 and 22 to zero. At this time, element 24 unlocks and passes the clock pulses of the generator 7 s 2 MHz to the summing input of the counter 10 address line in the regeneration mode, and through element 1BY-NOT 23 the generator RAS pulses are fed to the inputs of nodes 2 and 13 to fix the current addresses of the regenerated cells of both nodes in the RAM. Regeneration is done by referring to each of the 128 lines not

less than 2 ms with just one

5 signal RAS. In this case, the CAS signal is in a state of logical one. The required regeneration cycle time, equal to 2 ms, is in the specified tolerance, which is 0 PERFECT from the following considerations: long

five

0

SGI is equal to

GIS

 12th ISS;

the frequency of changing the address of the day in the regeneration mode is equal to f,. 2 MHz (Tf 0.5 µs); line scan period 55 64 ISS.

During the validity of a single GIS will be regenerated

 GIS

  12: 0.5 24 lines

The regeneration of 128 lines takes a time equal to

128: 24 128: 24 64 342 μs Thus, the regeneration cycle is performed during 342 ISS, which is less than 2 m

The multiplexer 11 is controlled by a code of signals on the bus of the SGI and at the output of the one-oscillator 17. In the regeneration cycle, this code is equal to 01, which ensures that the contents of the counter 10 are transmitted through the multiplexer 1 1.

The first 17 and the second 18 ones are launched with the back positive front of the SGI. The single-oscillator 17 generates a pulse with a duration of (350-400) HC 1. During this time, the line address in nodes 12 and 13 is set and fixed. The one-oscillator 18 generates a pulse of duration (200-240) HC. This impulse is necessary in order to take into account the delay in setting the line address at the inputs of node 13 introduced by counter 9, multiplexer 11 and adder 14. On the falling front of this pulse, a RAS signal is generated. At the output of the chain, trigger 21 is an OR-NOT 23 element. for the duration of the output pulse of the one-shot 17 will be code 11, which ensures the transfer of the contents of counter 9 to the address inputs of nodes 12 and 13. The positive-polarity pulse from the direct output of the one-shot 17 through element 26 goes to transfer stroke adder 14, thus permitting a shift in the row address unit to the input node 13.

On the back of the positive edge of the output pulse of the single vibrator I 7, the element 25 unblocks and allows the pulse transmission of the generator 7 to the summing input of the counter 8. At the same time, each positive edge of the generator 7 triggers the single vibrator 19, the output pulse of which generates a delay in the CAS signal at the inputs of the nodes 12 and 13 for the delay time introduced by the counter 8, the multiplexer P and the adder 14. The duration of the output pulse of the one-shot 19 is equal to (200-240) not.

At the direct output of the first single-vibrator 17 at this time there will be a logical zero, which prohibits

0

five

0

five

0

five

0

five

0

five

An element 26 for shaping the address of a column on node 1. At the control inputs of multiplexer 11, there will be code 10, which ensures transmission of the contents of counter 8 through multiplexer 11. This is how the columns are recorded by the CAS signal, which is formed on the falling back edge of the output pulse one-shot 19 on the inverse output of one-shot 20 duration (150-200) no. At the same time, the RAS signal is in the logical zero state, i.e. There is a page mode of record.

With the arrival of the next CGN, the process repeats: the regeneration cycle is going on - the content of counter 9 is increased by one — writing the columns of the next row.

Read mode is activated by closing the switch. At the same time, the operation of the node 16 for the formation of the above control signals remains the same as in the recording mode, but without shifting the addressing of the rows of the node 13, since in this case the input of the HE element 27 will be a logical zero level that will block the AND element 26, and the input of the transfer of the adder 14 will be constantly present level of logical O.

I

Shaper 15 works as follows.

The comparator 29 compares the voltage of the video signal from the television sensor 1 with the reference voltage, the value of which is chosen such that the comparator 29 operates on the amplitude of SGI and OIG. As a result, the OIGs of the OIG are formed at the output of the comparator 29, which are fed to the SGI bus and to the input of the delay circuit (the presence of OIGs on the SGI bus does not affect the correct operation of the control unit 15).

The OIG signal is generated at the output of the delay element 31, the parameters of which are chosen so that the capacity does not have time to charge to the level of a logical unit during the time of its operation at the OIG, resulting in the OTP not passing to the OIG bus. A prerequisite for the operation of the delay element 31, built on the NAND element, is the observance Ri 2 kΩ.

The time division block 6 operates as follows.

In the initial state, when the inputs of the circuit are zero signals, the triggers 32 and 33 are in the single state, and there are single signals on the output buses, since the inputs of the trigger 36 from the outputs of the expanders 35 and 34 receive zero signals. Let us assume that a positive pulse arrived at the clock input of the trigger 32 from the output of the node 13. This pulse by the leading edge brings the trigger 32 to the zero state. In this case, a single signal appears at the output of the expander 34, which enables the trigger 36 to be set to the zero state on the forward output. The zero signal from the direct output of the trigger 36, arriving at the setup input of the trigger 32, returns it to one state. At the output of the extender 34, the zero signal appears with a delay determined by the parameters of the expander circuit.

Thus, at the direct output of the trigger 36, a negative pulse is generated, with a duration.

At the output of the differentiating element, a negative signal is formed with a duration less than i) and determined by the parameters of the differentiating element 37.

Similarly, the chain operates trigger 32 - extender 34 - trigger 36 - differentiating element 38.

If during the formation of the output signal by the chain from the input signal simultaneously with the trigger 32, the trigger 33 also triggers (i.e. if the input pulses coincide in time), then immediately after the formation of the negative signal ends, the forward output of the trigger 36 begins to generate a pulse on the inverse trigger output 36.

When the pulses on the two installation inputs of the trigger 36 coincide, the trigger 36 can be set to one of two stable states with equal probability, which does not affect the correctness of the count of the number of images of objects.

The differentiating elements 38 and 37 are inserted to separate the back and front edges of the output pulses in time, which prevents the occurrence of front fronts at the inputs 1 and -1 of the reversing counter.

Quantization unit 2 is a threshold device whose task is to convert the threshold signals into digital form. The proposed device can be used to study moving multi-connected objects without recruiting for these purposes, for example, a video recorder.

Claims (2)

1. A device for counting the number of images of an object, containing a television sensor, the output of which is connected to the input of a quantizing unit, an OR element and a reversible counter, which are different in that, in order to expand the functionality of the device by analyzing the image, a memory block is inserted into it pulse separation unit, television sensor outputs and a quantizing unit are connected respectively to the first and second memory inputs, the first output of which is connected to the first input of the OR element and to the first input of the time division pulses, the outputs of which are connected to the inputs of the reversible counter, the second output of the memory unit is connected to the second input of the OR element , the output of which is connected to the second input of the temporary pulse separation unit. 2. The device of clause I, tL and - such that the memory block contains a pulse generator, the first, second and third counters, an adder, a multiplexer, the first and second RAM nodes and the control node, the first input of which is the first input of the memory unit, the output of the pulse generator is connected to the second input of the memory node, the first and second outputs of which are connected to the first input of the multiplexer through the first counter, the output of which is connected to the first inputs of the first RAM node and the first input of the second node RAM, the third and even-nummed outputs of the control node through. The second counter is connected to the fifth side; the 5th multiplexer, the fifth, sixth and seventh outputs;; and the transponder is connected to the second, third, respectively ;. and the fourth inputs of the first and second memory nodes, the outputs of which are correspondingly the second and first PGs of the memory unit, the second input of which is the combined fifth inputs of the memory nodes, the eighth and ninth outputs of the control unit - are connected to the third and one of the 1st multiplexer inputs, tenth ten, respectively;) the output of the control unit is connected to the second input of the adder, once the thirth output of the control unit through thirds; the counter is connected to the fifth input of the multiplexer. 3, The device according to claim 1, dated L and - h and y 1TS e e; so that the node is controlled, it contains from pair-to-fourth fourths, first and second triggers, first, HTOpoii and third elements AND, first and second elements NOT. the I-IC element, the key and the Impulse Driver, the input of which is the first BXO / VOM of the control unit, the irregular output of the former — the pulses is the output of the control unit and is connected to the inputs of the first single-vibrator, the second MCiiTa NOT and with the first and second triggers, the second one (;: o1; the pulse generator and the output of the second element are NOT the first and the third and the fourth hub, the control node, and the first output of the first one is the first the output of the control unit and by; 1kl; bees i; the first input of the third element I, the output of the key n with the second input of the third element I and with the input of the first NOT which breathing is the fifth output of the control unit 1lepi, the second output of the first control panel is 1; connected to the first input of the second element I and to the second input of the second trigger, the first output of which is connected with the first input of the first element, the output of which is the one output of the control unit and connected to the first input of the NAND element, the output of which is the seventh output of the control unit, the combined second inputs of the first and second elements of AND are the second input control node, the second output of the second trigger is connected to the third input of the second element And, the output of which is the second output of the control node and through the third one-oscillator connected to the input of the fourth one-oscillator, the output of which is the sixth output of the control node, the output of the third element And dec The output of the control unit, the first output of the second one-shot is connected to the second input of the first trigger, the output of which is connected to the second input of the NAND element, the second output of the second one-shot is the first output control node house. 4, The apparatus of claim 1, wherein the temporal pulse separation unit comprises triggers, pulse spreaders and dis} n}) transducer elements, clock inputs of the first and second triggers, respectively, the first and second pulse separation unit , the outputs of the first and second triggers are connected respectively via the first and second pulse expanders with the installation inputs of the third trigger, the direct output of the third trigger is connected to the installation input of the first trigger and The riz element, the inverse output of the third flip-flop is connected to the setup input of the second flip-flop and the input of the second differentiating element, the outputs of the differentiating elements are the outputs of the temporal pulse separation unit. The information inputs of the first and second triggers are grounded. Sitod SnjiodJO noffZ Shina Kgi and,  on Video signal