SU1487071A1 - Analog multiplier - Google Patents

Description

The invention relates to electrical computing devices and can be used in analog computers. The aim of the invention is to improve the accuracy. ¹ Analog multiplying device contains first to fourth field-effect transistors 1-4 that perform the function of controlled resistance, Bias voltage source 5, operational amplifier 6, bias resistor 7, zero potential bus 8, scale resistor 9, input of the first signal of multiplier 10, output 11, differential cascade 12, the input of the second signal-multiplier 13. The operation of the analog multiplying device is based on the control of the transmission coefficient of the voltage divider of the first signal-factor, formed by the field transistors 1-4,. as a function of the second signal factor. 1 il.

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1487071 A1

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The invention relates to electrical computing devices and can be used in analog computers.

The purpose of the invention is to improve the accuracy

The drawing shows a functional diagram of an analog duplicating device.

The device contains the first to fourth field-effect transistors 1-4, the bias voltage source 5, the operational amplifier 6, the bias resistor 7, the zero potential bus 8, the scale resistor 9, the input 10 of the first Multiplier signal, the output 11, the differential stage 12 and the input 13 second signal multiplier.

Analog duplicating device works as follows.

The gates of field-effect transistors 1-4 are supplied with linear combinations of the second signal-compo- nent from the input 13, the signal from the output of the operational amplifier 6 and the voltage from the output of the source 5 of the bias voltage through the differential stage 12.

The voltage of the first signal multiplier from the input 10 is supplied to the sources of the third and fourth field-effect transistors 3 and 4, which together with the first and second field-effect transistors 1 and 2 form controlled voltage dividers. The voltages from the drains of the first and second field-effect transistors 1 and 2 are applied to the inverting and non-inverting inputs of the operational amplifier 6. The magnitudes of these voltages depend on both the magnitude of the first multiplier signal from input 10 and the ratio of the wires,

. Dimottey drain channels - the source of the first, second, third and fourth field-effect transistors 1-4. Conductance of channels drain - source, c. turn, are determined by the values of the second signal-factor from the input 13 and the output voltage of the operating. amplifier 6. If the parameters of the field-effect transistors 1-4 are identical, the voltage at the output 11 can be written as

where b is the specific slope of the field effect transistor;

Cd is the differential gain of the differential stage 12;

1m - the resistance of the scale resistor 9, '

and <and ₉ are the voltages of the first and second signal multipliers.

If we take into account that the value of the second term in the denominator of expression (1) is significantly greater than one, then the expression for the output voltage of the device takes the form>

and _YOU x = i,. and ^ (2)

From the expression (2) it follows that the voltage at the output 11 does not depend on the conductivity of the field-effect transistors, which increases the accuracy of the analog multiplying device.

Claims (1)

Claim Analog multiplying device containing the first, second, third and fourth elements with controlled conductivity, made respectively on the first, second, third and fourth field-effect transistors, operational amplifier, to the inverting and non-inverting inputs of which the drains of the first and second field-effect transistors are connected, the drain of the first field-effect transistor is connected to the drain of the third field-effect transistor, the source of which is connected to the source of the fourth field-effect transistor and is the input of the first sig a device multiplier, the drain of the fourth field-effect transistor is connected to the drain of the second field-effect transistor, the source of which and the source of the first field-effect transistor are connected to the zero potential bus, a scale resistor is connected between the inverting input and the output of the operational amplifier, the non-inverting input of the operational amplifier is connected to the zero potential bus, the gates of the first and fourth field transistors are interconnected, the gates of the second and third field effect transistors are connected to I am waiting for myself, the source of the bias voltage, the output of the operational amplifier is the output of the device, which is that, in order to improve the accuracy, a differential stage is introduced into it, the first signal input of which is the input of the second signal of the device multiplier The output of the operational amplifier is connected to Vtr10107071 The second signal input of the differential stage, to the input of the bias voltage control of which is connected to the output of the voltage source of the budget, the first and second outputs of the differential stage are connected to the gates, respectively, of the second and first pale transistors.