SU1483484A1 - Device for digital magnetic recording and playback of video signal - Google Patents

Abstract

The invention relates to instrumentation engineering and allows improving the accuracy of displaying on a recording medium, such as a photographic one, of a previously recorded video signal reproduced from a magnetic carrier by providing the phasing of the development drum of the image recorder with the beginning of the video signal lines. For this, in the recording channel, the device contains a serially connected peak detector, an analog-digital converter, a shift register, a recording unit and a recording head, and in the playback channel, a serially connected playback head amplifier, information recovery unit, the second and third registers, and the third register outputs are connected through a digital-to-analog converter to the image recorder and to the first decoder. The outputs of this decoder are connected to two parallel circuits, each consisting of a decoder, a pulse counter and a pulse former loaded through an OR element to the installation inputs of the counters and a second conversion unit connected to the second output of the second decoder via an And element, the second input connected to the second the output of the third decoder, and the output through the trigger, the second element And connected to the first decoder, the third unit conversion, the installation input connected to another output of the first decoder, Connected to the control unit by the image recorder motor. 3 il.

Description

The invention relates to instrumentation, in particular, to devices, with the help of which it is possible to carry out digital magnetic recording and reproduction of video signals and then displaying the i-image on a recording medium, such as a photographic one.

The purpose of the invention is to improve the accuracy of the playback result and

image display on the recording media.

FIG. 1 is a functional diagram of the proposed device; FIG. 2 - video signal line structure; in fig. 3 - structure of clock pulses.

The device contains (Fig. 1) serially connected input

press 1, peak detector 2, anapogram digital converter (ADC) 3, the control input of which is connected to the input terminal through the pulse shaper 4, the first register 5, the input of which code is connected to the output of the clock pulses of ADC conversion cycles It is connected with the shaper 4 through the generator of the 6 pulse series, the recording unit 7 and the magnetic recording head 8. In the playback channel, the device contains serially connected playback magnetic head 9, playback amplifier 10, information recovery unit 11, second and third registers 12 and 13, the control inputs of which are connected to the clock output of unit 11 directly and through the first conversion unit 14. The outputs of the register 13 are connected to the output data bus 15. A synchronization clip 16 is connected to the recalculation unit 14, to the first decoder 17 and to a digital-to-analog converter (D / A) 36. The outputs of the decoder 17 are connected to parallel circuits consisting respectively of serially connected first and second counters 18 and

19 pulses, the second and third decoders 20 and 21, the first and second pulse formers 22 and 23 pulses The outputs of these circuits through the OR element 24 are connected to the installation inputs of counters 18 and 19 and the second conversion unit 25, whose output through the trigger 26 and the first element And 27 connected to the counting input of the third unit 28 conversion, and the input is connected to the second element And 29, the inputs connected to the second outputs of the decoders

20 and 21. The second input of the AND element 27 is connected to one of the outputs of the decoder 17, and the output of the conversion unit 28 is connected to the trigger 26 and to the motor control unit 30 of the recorder 31 of the recorder 32} the recording unit 33 is paired with the carrier 34 fixed to the spreading drum 35

Full line of video signal (figure 2 contains the sync pulse CA of the channel A line, the signal KA information signal A of channel A, the telemetric signal TA of channel A, the sync pulse SV of the line of channel B, the signal KB, the information signal B of channel B and the telemetric signal of TV channel B. On dia

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The gramme a (Fig. 3) shows the structure of the sync pulse SA of channel A, which contains seven elements, each 2t0 in duration, and the diagram B shows the structure of the sync pulse CB of channel B, which also consists of seven elements, each 3te in duration.

The device can work both in the video signal recording mode and in the playback mode.

In the recording mode, the input signal is fed through the input terminal 1 simultaneously to the peak detector 2 and the driver 4 pulses. Detector 2 extracts the signal envelope that is fed to the ADC 3 triggered by zero-crossing pulses of the former 4. Digital video samples are completed at the end of the conversion cycles to the register 5, to the shift input of which is fed a series of pulses from generator 6 triggered by former 4. Number the pulses of each series are then equal to the number of binary bits of the converter 3. Therefore, using the block 7 and the head 8, the digital equivalents of the video signal are recorded sequentially on magnetic media (not according to cauldron). During playback, the signal from the head 9 is fed to the playback amplifier 10 and then to the information recovery unit 11, from separate outputs of which the code and clock pulses are sent to the shift register 12, and the clock pulses to the conversion unit 14. When the output pulse of the block 14 appears, whose conversion factor is equal to the number of binary bits in one sample of the video signal, the code is received into the register 13, which is fed to the device bus 15, the DAC 36 and the decoder 17 with pulse polling. The voltage from the output of converter 36 goes to recording unit 33 of recorder 32, which displays the reproduced video signal onto carrier 34 fixed to a development drum 35. Phasing of the rotation period of drum 35 with signals of video signal lines is thus performed as follows.

Digital samples of the reproduced video signal from the register 13 come to the decoder 1 7, which you.

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gives pulses corresponding to high and low values of the video signal. The high and low sample sequences are counted by counters 1 9 and 18 pulses, respectively. The decoders 20 and 21 at the same time issue pulses to their first outputs when reaching the counter code corresponding to the number of counts during the duration of one clock element. At the second outputs, the said decoders give pulses when the number of high or low counts characteristic of one clock element is exceeded, which indicates that this segment of the line does not belong to the class of clock elements. Therefore, the pulses of the imaging unit 23, emitted when the counter code 19 reaches the number of high samples, characteristic of one clock element, pass through the AND 29 element opened by the decoder 20 in the presence of the counter 18, corresponding to the number of low sync element counts. The number of output pulses of the AND 29 element is counted by the recalculation unit 25, the conversion factor of which determines the threshold level of the selection of the sync pulse of a line by the number of its elements. If there are longer line segments with high or low counts, the formers 22 and 23 at jumps of their input voltages give out pulses that are collected by the OR 24 element, setting up the initial states of the counters 18 and 19 and the recalculation block 25. After block 25 triggers, trigger 26 tilts, which indicates an accumulation of a threshold number of consecutive elements of a clock signal. The next step is to determine whether the sync signal detected in this way is the desired type of line clock, for example, the CB signal of the infrared channel B.

Using the recalculation unit 28, high counts are counted from the output of the decoder 17, since the CB signal follows the CB sync pulse with the maximum level. After block 28 triggers, its output pulse overturns trigger 26, preparing the device for detecting

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blowing sync line. During the action of the resolving potential from the output of the trigger 26 to the element

And 27 are possible occurrences of low

comte, corresponding to the elements of the sync series after determining its threshold value. These pulses are used to set the initial state of the recalculation unit 28, which eliminates the premature detection of the line clock. Defined in this way the sync pulse line from the output of block 28 is fed to

motor control unit 30 of the recorder 32, which contributes to the phasing of image lines on the carrier blank 34.

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Claims (1)

Invention Formula A device for digital magnetic recording and playback of the video signal j, containing a serially connected input terminal, a peak detector, an analog-to-digital converter, a first register, the shift input of which is connected to the input terminal through a series pulse generator and pulse shaper unit recording and magnetic recording head, serially connected magnetic playback head, playback amplifier, information recovery unit, second and third registers, control inputs of which are connected to the output of the sync pulses of the information recovery unit directly and through the first conversion unit, output connected also to the sync output terminal of the device, and the outputs of one of which are connected to the output information bus of the device, the digital-to-analog converter and the image recorder connected to a trigger with separate start inputs and the first AND element connected to the register output, the first decoder, pulse shaper, OR element and pulse counter, characterized in that, in order to improve the accuracy of the playback result and display the image on the recording media, it is equipped with two parallel circuits, consisting respectively of successively connected first and second pulse counters, the second and third decoders, the first second and second pulse formers and connected by inputs to the outputs of the first decoder, and outputs through an OR element to the installation inputs of the initial state of the counters connected in series by the second | Element And whose inputs are connected to the second outputs of the second and third decoders, and the second unit recalculation, output connected to one of the trigger input and input 834848 settings - with the output of the OR element, the third conversion unit, the counting input connected to the output of the first element AND, the second input connected to the output of the first decoder, the installation input connected to another output of the first decoder, and the output connected to the second input of the trigger and to the unit Image Recorder Control. Phi.1 31 Ztt but 1LLYG1G1 Jto Fig.Z FIG. 2 2tt