SU1474664A2 - Computer/communication channel interface - Google Patents

Abstract

The invention relates to the field of computer technology, in particular, to devices for interfacing an electronic computer (computer) with subscribers via communication channels, and can be used in the construction of automated control systems. In order to increase the reliability of information exchange, a register of information, a parity decoder, a third OR element, two AND elements and two NOT elements are entered into the device. The device provides control of the information flow in the interface between the computer and the device, informs the computer about failures and allows re-issuing information without transmitting it to the communication channel in case of a failure. 1 il.

Description

one

The invention relates to computing, in particular to devices for interfacing an electronic computer (HEM) with subscribers via communication channels, can be used in the construction of automated control systems and is an improvement on a known device / auth. No. 703799.

The aim of the invention is to increase the reliability of the exchange of information.

The drawing shows the proposed device.

The device contains switch 1, control unit 2, serial to parallel converter 3, buffer memory block 4, information register 5, control block 6, pulse distributor 7, parity decoder 8, AND 9 group of elements, second and first HE elements 10 and 1-1,

WITH

And 12 and 13 elements, trigger 14, address register 15, exchange end register 16, counter 17, elements OR 18 and 19, first input 20, second output 21, first output 22, second information input 23, element OR 24, fourth exit 25, the third input 26, the third output 27, the fifth input 28, the fourth input 29, a group of inputs 30 and the input 31 of the check bit.

The device works as follows.

In the initial state at the output 25, the presence of high potential corresponds to the Ready signal of the device connected to the input of the digital computer. This signal from the digital computer to input 29 and further to register 15 receives the position code of the communication channel number, and in block 4, input 23 through register 5 receives information that is not

ABOUT)

about

Yu

It is necessary to transfer from the digital computer to the communication channel. By the signal at input 26, trigger 14 is turned off and counter 17 is started to count the waiting time for the end of the exchange.

During normal operation of the subscriber and his willingness to work at the input of the corresponding element And 9 there is a high potential. When this potential coincides with 1, the corresponding register register 15 and the output of the element OR 24 send a signal to one of the inputs of block 6, which through the switch 1 connects the information inputs of one of the subscribers. Using the distributor 7 of pulses, information from block 4 is read.

For the time of exchange in the Transmission mode, the subscriber removes a high potential at the input 30, which is restored only after the end of the exchange, and this potential, which appeared at the input of the corresponding register bit 16, through the OR element 18 resets the counter 17 and through the OR element sets trigger 14 to ready state, in which the device is ready for the next exchange cycle.

, 35

40

45

If the subscriber malfunctions at the input of the corresponding element And 9, there is no high potential, or the output of the corresponding bit of the register of 16 is not a sign of the end of the exchange. Then the counter 17 generates an overflow signal (the filling of the counter 17 occurs with pulses arriving at the input 28), which, through the OR element 19, switches the trigger 14 and enters the output 27. According to the signals from the digital computer, a re-transmission of information is organized to the same communication channel (in the event of a failure) or to another channel (faulty). “Subscribers usually have the opportunity to determine whether there is any information in the received error information. Error detection in information received from subscribers in the device is carried out by control unit 2, which, if there is a failure, informs the digital computer about it through the converter 3 codes and block 4. If there is a digital error, sends a request through the transmission path to the subscriber for repeated transmission

Q 5

0

five

0

five

0 -

Reduce the information in which the block 2 failed.

Information control between the device and the digital computer is organized, for example, by parity. If there is no information error and, if there is an even number of information bits in the received information, signal O is present at the output of the decoder 8, the same signal is also present at input 31 of the device, it passes through the elements HE 10 and 11 to the input of element I 13 and through the element OR 24 to the inputs of elements AND 9. If there is an odd number of bits in the received information, then the output of the decoder 8 is signal 1, the same signal is also input 31 of the device. These signals go to the inputs of the AND 12 element and then through the OR element 24 to the inputs of the AND 9 elements, after which a signal is transmitted to one of the inputs of block 6 to transmit information to the communication channel

In the case of a fault in the information between the device with communication channels and the digital computer, the signals from the device input 31 and the decoder 8 do not match, therefore the output of the OR 24 - O element prohibits the operation of the elements I.

Counter 17 generates an overflow signal, which, through element OR 19, switches trigger 14 and goes to output 27. The appearance of signals at outputs 25 and 27 informs about erroneous data transfer. According to the signals from the digital computer, a re-transmission of information to the same communication channel is organized.

Claims (1)

Invention Formula A device for interfacing a computer with communication channels by author. St. No. 703799, characterized in that, in order to increase the reliability of information exchange, an information register, a parity decoder, a third OR element, two AND elements and two NOT elements are entered into the device, and the information register input is the device input for connecting the computational information output machines, and a serial output and a group of outputs are connected respectively to the second input of the buffer memory block and a group of inputs of the parity decoder, the output connected to the first input of the first element And through the first ement NOT 514746646 to the first input of the second element And, the outputs of the first and second elements And connected respectively with the first and second inputs of the third element OR, the second input of which is connected via the second element NOT to the second input the first element And the input of the device, the output of which is connected to the third VA for the connection to the output of the control - the inputs of the elements of the AND group, the computer’s