SU1458868A1 - Output voltage stabilizing device - Google Patents

Description

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The invention relates to electrical engineering and radio electronics and can be used in power supply devices of automation, computing and communication facilities.

The goal is to increase noise immunity by providing emergency shutdown and limiting the output voltage level.

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Figure 1 shows the block diagram of the system for stabilizing the direct voltage; figure 2 is a functional diagram of the first node analysis., and display; FIG. 3 is a diagram of the second analysis and display unit.

The device contains (1) serially connected transformer 1, rectifier 2, output filter 3, fuse 4, control transistor 5, the signal input of which is connected to the output of stabilizer 6, output filter 7, the output of which is connected to the input of control transistor 5 through serially connected divider 8 of the output voltage, the comparison node 9, the transistor switch 10, the output of the comparison node 9 through the first key element P is connected to the first input of the first node 12 of the analysis-and display, the second go

connected to the first input of the second Uala 13 analysis and display and with the BHJ stroke, the time of the master node 14, while the second input of the second node 13. analysis and display connected to the output of the output filter 7 through the node

15. protection comparisons, the outputs of the analysis and indication units 12, 13 are connected to the second and third inputs of the NAND element 16, the first input of which is connected to the input of the first inverter 17,

and through the COP-chain 18 - with the first input of the first element OR-NOT 19, and the output of the element AND-NOT 16 through the second and third inverters connected in series with the first input of the second element OR-NOT 22, the second input of which is connected to the output of the first inverter 17, and the output is connected through the third element OR NOT 23. with the inputs of the second and third key elements 24, 25,

however, the input of the second KS-chain 26 is connected to the Reset bus, and the output is connected to the second input of the ШШ-НЕ 19 element.

Moreover, the analysis and indication units (Fig. 2, 3) consist of the element OR whose NO is connected to the input of the RS flip-flop 28, the output of which is connected to the input of the amplifier -29, the output of which is; Rogr connected to the indicator 30.

The device works as follows.

The stabilized voltage appears at the output of the device during loading.

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The input voltage and the Power On, Power commands, which are fed 1 to the inputs of the first inverter 17, to the first input of the I-HE element 16 and the RC-chain 18 ,. from which, through the first element OR NOT 19, a signal arrives at the installation of a short-circuit trigger 28 of the nodes 12 and 13 of the analysis and indication to the initial state, in which the second and third inputs of the AND-16 element are received 1. If present, on.

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three inputs of the I-ib i element, and at the fourth input 1 from the bus of the serviceability of the power supply units, O appears at its output, while on. the output of the second inverter 20 is output to the control bus, and through the third inverter 2 is fed O to the first input of the second element OR NOT 22. If O is present at the inputs O, the element OR NOT 22 through the element OR NOT 23 and the key element 25 sends a signal to switching on the stabilizer 6, with the regulating 25, the transistor 5 and the output of the device, a stabilized output voltage appears. At the same time, the OR-NOT element 23, through the key element 24, generates a signal for switching on the time of its node 14, whose time delay is determined by the device availability time. .

When the output voltage rises to the level of operation of the protection 35, the comparison node 9 generates a mismatch signal that enters the transistor switch 10, which limits the voltage level that comes to the input of the control transistor 5, therefore, limits - the level of the output voltage of the device, simultaneously the comparison node 9, through the key element 11, outputs 1 to the 12 analysis and indication node, from the output of which O comes to the input of the AND-16 element, simultaneously the amplifier 29 turns on the indicator 30 which si It raises a malfunction of the device by exceeding the output voltage.

When O appears at any input of an element AND-NOT 16, its output is detected in .1, if .This, through the inverter 20, a fault signal is received into the 55 output control bus and through the inverter 21, the elements OR-NOT 22 , OR-NOT 23, a signal arrives on the whistle. A stabilizer 6 with an adjusting transistor 5 is removed.

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output voltage of a device for stabilizing a constant voltage.

When the output voltage of the device increases due to a malfunction in the stabilizer 6 or in the control transistor 5, the devices operate as indicated, but the transistor switch 10 burns the fuse A, thereby disconnecting the output voltage of the device.

When the voltage drops below the tolerance: the level through the node 15, the protection enters 1 at the second input of the second node 13 of the analysis and display. If the fourth and fifth inputs are present, the device shuts off as indicated, and an indication of a device undervoltage failure appears. If the decrease in the output voltage is the result of triggering the protection by raising the output voltage and turning off the device, the signal coming from the output of the first analysis and display unit 12, O, does not allow the device to indicate a malfunction to reduce the voltage of the node 13 analysis a and indications.

To re-enable the device after disconnecting the circuit, the Reset is fed 1 to the second input of the element OR NOT 19 through the RC-chain 26, and its output is sent O to the RS-flip-flop 27 nodes 12 and 13 of the analysis and display in the initial state. the In this case, the device works as when turned on.

In order to create a multichannel device for stabilizing the power supply using the proposed: circuits, the control bus must be combined; When the power signal is applied and the appearance of 1, the output of the element 20 of all the combined voltage stabilizer devices is 1 on the control bus. When at least one device malfunctions, a signal appears about its malfunction on the device itself and a signal is output to the control bus, and at the input of the element 21 of all devices it appears. 1. This signal turns off all the combined devices (in the absence of the .. Locking signal).

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All of these processes occur in the presence of about the blocking circuit, which goes to the second input of the element OR NOT 23.

If there is 1 on the device blocking circuit, the device operates as follows: - at the indicated malfunctions, the malfunction on the device for voltage stabilization is indicated in 1, O comes to the control bus, but the command to disconnect the device is not received from the OR-NOT 23 element That allows 5 device. In blocking mode to work smoothly.

Thus, the invention makes it possible to create a number of unified devices having built-in protection against any malfunctions along the internal and external circuits of the device for voltage stabilization, as well as during non-stationary processes. In addition, devices constructed according to the proposed scheme can be combined into a multichannel device for voltage stabilization, integrated over the control bus,

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A device for stabilizing the output voltage, comprising an output filter, a transistor switch, a comparison node, a protection comparison node, an output voltage divider, a time master node, two key elements, an analysis and display node

and pins for connecting busbars Reset and Turn on the power., that is, in order to increase noise immunity at the expense of; emergency shutdown and limiting the output voltage level; a transformer, a rectifier, an input filter, a fuse, a voltage regulator, a regulating transistor, a third key element, three inverters — three elements OR — NOT, an AND element NOT, two RC chains, a second analysis and display node and outputs for connecting the Blocks, Input, control and .Output control buses, with the transformer output through a rectifier, an input filter, a fuse, a control transistor with the input of the output filter, output de

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voltage is connected to the input of the comparison node, the output of which is connected via a transistor switch to the input of the regulating transistor and through the first key element to the first input of the first analysis and indication node, the second input of which is connected to the output of the master node and to the first input of the second analysis node and indications, the second input of which is connected through the protection comparison node to the output of the output filter, the third inputs of the analysis and indication nodes are connected to above 15 by the stroke of the first element OR NOT, the first input of which is connected Inen with the output of the first RC-chain, the input of which is connected to the input of the first inverter.

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the input of which is connected to the output for connecting the bus Blocking and the output of the third element OR NOT through the second key element connecting to the input of the voltage regulator, the output of which is connected to the control input of the regulating transistor and the second input of the first element OR NOT through the second CS- the chain is connected to the output for connecting the bus Reset, while the first node analysis and display consists of an input element IS-NOT, RS-flip-flop, amplify and indicator, and the output of the element IS-NOT through RS-trigger and amplifier is connected to the indicator, p In these, the first and second inputs of the element AND-NOT are respectively the first and Bi

with the output for connecting the bus including the inputs of the power analysis and indication node, the fourth input of the second node analysis and indication, and the first input of the NAND element, the second input of which is connected to the output of the second analysis and indication node, the third input the output of the first and the fifth input of the second analysis and indication node, the fourth input - with the output for connecting the Input Control bus, and the output - through the second inverter is connected to the outlets for connecting the Output Control bus and with the input of the third inverter, -the output of which is connected to th input element .vtorogo-OR-NO element, a second input coupled to an output of the first inverter, and the output - to the first input of the third OR-NO element, the second

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the input of which is connected to the output for connecting the bus lock, and the output of the third element OR NOT through the second key element is connected to the input of the voltage regulator, the output of which is connected to the control input of the regulating transistor and the second input of the first element OR NOT through the second KS chain connected to the output for connecting the bus Reset, while the first node analysis and display consists of an input element, AND-NOT, RS-flip-flop, amplifier and indicator, the output of the element-NOT through RS-trigger and the amplifier is connected to the indicator the first and second inputs of the AND-NOT element are respectively the first and Bi-o5

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The third input of which is the R input of the RS flip-flop, the zero output of which is the output of the analysis and indication node, and the second analysis and indication node consists of. input NAND, RS-flip-flop, amplifier and indicator, wherein the output of the NAND element through the RS-flip-flop and amplifier is connected to the indicator, while the first, second, third and fourth inputs of the AND-N element are respectively the first, the second, fourth and fifth inputs of the analysis and indication node, the third input of which is the R-input of the RS flip-flop, the zero output of which is the output of the analysis and indication node.

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Claims (1)

Claim A device for stabilizing the output voltage, comprising an output filter, a transistor switch, a comparison unit, a protection comparison unit, an output voltage divider, a timing unit, two key elements, an analysis and indication unit, and outputs for connecting the Reset and Power On buses. , what, in order to increase the noise immunity due to? providing emergency shutdown and limiting the level of output voltage, a transformer, a rectifier, an input filter, a fuse, a voltage regulator, a regulating transistor, a third key element, three inverters, three elements OR-NOT, an AND-NOT element, two RC- chains, the second node of analysis and indication and the conclusions for connecting the buses of the Block, Input, control and Output control, while the output of the transformer through the rectifier, input filter, fuse, control transistor is connected to the input ohm of the output filter, the output of de7 1458868 8 voltage separator is connected to the input, the input of which is connected to the output of the comparison node, the output of which through the transistor switch is connected to the input of the regulating transistor and through the first key element with the first input of the first analysis and indication unit, the second input of which is connected to the output of the timing unit and with the first input of the second analysis and indication unit, the second input of which is connected through the protection comparison unit to the output filter output, and the third inputs of the analysis and indication units are connected They are connected with the output of the first IPI-NOT element, the first input of which is connected to the output of the first RC circuit, the input of which is connected to the input of the first inverter, with the output for connecting the bus “Turning on the power 20”, with the fourth input of the second analysis node and indications and with the first input of the NAND element, the second input of which is connected to the output of the second analysis and indication unit, 75 the third input - with the output of the first and fifth input of the second analysis and indication unit, the fourth input - with the output for connecting the Input control bus , and the output is through the second 30 inverter with It is connected to the output for connecting the Output Control bus and to the input of the third inverter, the output of which is connected to the first input of the second ¹ element, OR-HE, the second input 35 of which is connected to the output of the first inverter, and the output to the first input of the third element OR- HE, the second is for blocking the bus, and the output of the third OR-HE element through the second key element is connected to the input of the voltage regulator, the output of which is connected to the control input of the regulating transistor, and the second input of the first element OR is NOT through the second RC circuit y is connected to the output for connecting the Reset bus, while the first analysis and indication unit consists of an NAND input element, an RS trigger, an amplifier and an indicator, and the NAND output of the element via an RS trigger and an amplifier is connected to an indicator, first and. the second inputs of the AND gate are, respectively, the first and second inputs of the analysis and indication unit, the third input of which is the R-input of the RS flip-flop, the zero output of which is the output of the analysis and indication unit, and the second analysis and indication unit consists of. the input element AND-NOT, RS-trigger, amplifier and indicator, and the output of the element AND through the RS-trigger and amplifier is connected to the indicator, while the first, second, third and fourth inputs of the element AND are NOT, respectively, the first, second , the fourth and fifth inputs of the analysis and indication unit, the third input of which is the R-input of the RS-trigger, the zero output of which is the output of the analysis and indication unit. Fig. 1 deig. 2 Fig. 3