SU1453378A1 - Supply voltage stabilizer for integrated watch circuit - Google Patents

Abstract

The invention relates to stabilized power sources and can be used to create autonomous watches. The purpose of the invention is to expand the area of stable operation, ensure self-starting and simplify the manufacturing technology. The goal is achieved in that the potential rise in the drain of the transistor 14 leads to a fast charge of the capacitor 11. The transistor 10 is blocked up, which leads to a decrease in the amplitude of the output signal of the quartz oscillator. This in turn causes the transistors 10 and 14 to open up. Moreover, if due to the effect of destabilizing factors the amplitude of the output signal of the crystal oscillator changes, this will lead to a change in the blocking voltage at the gate of the transistor 10 and the amplitude of the output signal of the generator will remain unchanged. . Noah. 2 hp f-ly, 3 ill. S (l

Description

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The invention relates to electrical engineering and can be used to create autonomous wristwatches on KNOP transistors with reduced battery consumption.

The aim of the invention is to expand the area of stable operation, to ensure self-starting and to simplify the manufacturing technology.

FIG. 1 is a schematic diagram of the device; in fig. 2 is a schematic diagram of a stabilizer with resistors made in the form of n-channel transistors; FIG. 3 is a schematic diagram of a stabilizer with p-channel transistors included in the current mirror circuit.

The power supply voltage regulator of the clock integrated circuit (Fig. 1) consists of a crystal oscillator containing p- and p-channel transistors 1 and 2, a trimming capacitor 3, a feedback resistor 4, a crystal oscillator 5, an output 6 of the crystal oscillator blocking the capacitor 7, a phase-shifting capacitor 8, as well as from a detecting diode 9, regulating an n-channel transistor 10 with a first integrating capacitor 11 and a load resistor 12, a diode 13 of a leak, an amplifying p-channel transistor 14, a bias resistor 15 and a second About an integrating capacitor 16, a stabilized power bus 17, a common bus 18 and a power bus 19.

To the output 6 of the crystal oscillator, an anode of the detecting diode 9 is connected, the cathode of which is connected to the gate of the p-channel transistor 14 and to the first terminals of the second integrating capacitor 16 and the bias resistor 15, the second terminals of which are connected to the power supply bus 19. The drain of the amplifying p-channel transistor 14 is connected to the first output of the load resistor 12 and to the cathode of the leakage diode 13, and the source to the common bus 18. The control n-channel transistor 10, the drain and source of which are connected to the stabilized power bus 17 and the power bus 19 respectively, and the gate is connected to the anode of the diode 13 and the first integrating capacitor 11, the second output of which is connected to the common bus 18.

Stabilizer (Fig. 2) with resistors 12 and 15, made in the form

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p-channel transistors 20 and 21, the gates of which are connected to the common bus 18, sources to the power bus 19, and the drains of these transistors are connected to the cathodes of the leakage diode 13 and the detection diode 9, respectively.

The stabilizer (Fig. 3) with n-channel transistors connected according to the current mirror scheme, the gates of transistors 20 and 21 being combined and connected to the output of the stabilized current generator (GTS) 22, the gate and drain of the transistor 23 are interconnected and also connected to the output GTS 22, and the source is connected to the power bus 19.

The stabilizer works as follows.

When the supply voltage is turned on across the supply buses 18 and 19, the gate of the p-channel transistor 14 through the bias resistor 15 is supplied with unlocking voltage determined by the sum of the threshold voltage of the p-channel transistor 2 and the voltage drop across the diode 9, thus ensuring reliable unlocking the transistor 14. due to the excess - above the threshold voltage by the value

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where uj.

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the voltage across the gate of the transistor 14;

threshold voltage of transistor 2;

voltage drop on diode 9.

Unlocking the transistor 14 leads to the complete unlocking of the transistor 10, on the gate of which there is a potential close to zero. As a result, the almost complete voltage supply E is supplied to a crystal oscillator, which leads to generation. The output signal from the crystal oscillator 6 is fed to a detection diode 9, the load of which is a bias resistor 15 and an integrating capacitor 16. This circuit separates the positive polar component from the generator output signal, which leads to a decrease in potential at the gate p -channel transistor 14 and lock it up. The time constant of the detector circuit is determined by the values of the bias resistor 15, the capacitor 16 and the choice of 3

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In such a way that (3y the effect of the locking voltage spread over several periods of the generated frequency, f RC (5-50) T, so that in the intervals between the output pulses the potential at the gate of the transistor 14 did not significantly change on the drain of the trasistor 14 leads to a fast charging of the capacitor 11 through the load resistor 12 and the leakage diode 13. connected in the forward direction. The n-channel transistor 10 is locked up, which leads to a decrease in the voltage on the bus connected to the source of this transistor , and traces It is important to reduce the amplitude of the output signal of the generator, which causes the transistors 14 and 10 to open up and the voltage on the stabilizer output bus 17 to increase. Moreover, if due to any destabilization factors (voltage variation, load change oscillator, etc.). the amplitude of the oscillator-signal of the generator at output 6 will change, this will lead to a change in the blocking voltage at the gate of the regulating transistor 10, while the amplitude of the output signal of the generator will remain unchanged oh.

The described interaction mechanism is determined by the action of the overall negative feedback on the output voltage of the generator, due to which the output voltage of the stabilizer is dynamically stabilized at the level required for stable operation of the generator with the minimum current consumption. If, for any reason, a generator oscillations fail.

the opening potential at the gate of the transistor 14 will increase and activate the mechanism described, resulting in a full supply voltage on the bus 17.

To prevent low-frequency parasitic oscillations while regulating the voltage level of the stabilizer, an integrating circuit consisting of a capacitance 11, a reverse resistance of the diode 13 and a resistor 12 is connected to the gate of the control transistor 10.

The charge of the capacitor 11 occurs rather quickly through the resistor 12, and its discharge is irpigolite copper o

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a series of 3-5 s) through the reverse resistance of the diode 13 and through the drain circuit of the transistor 14, which is in active mode. In the process of regulation, this leads to a rapid decrease in the voltage on the pin 17 and to its slow increase, which leads to the suppression of parasitic oscillations arising due to the transient characteristics of the quartz resonator.

There are several ways to implement integral-mode resistors in CMOS technology: a resistor 15 on a pocket (Fig. 1) is a resistor in the form of a LONG n-channel transistor with a constantly open channel (Fig. 2) and a n-channel transistor connected in circuit, made in the form of a current mirror (Fig. 3). In the latter case, it is necessary to create a GTS, setting the required amount of current in the desired part of the circuit. The magnitude of this current is generally determined by the ratio of the sizes of the transistors included in the current mirror to the size of the current-setting transistor included in the GTS.

Thus, the present invention allows to increase the area of stable operation of the generator in a wide range of changes in its electrical loads; provide a reliable mechanism for self-starting the generator when the power is turned on and forcibly disrupted its oscillations; to ensure that the output parameters of the stabilizer are not critical to the variations of the resistors included in the device, which simplifies the technological processes in the manufacture of the circuit.

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Claims (3)

1. A power supply voltage regulator with a clock integrated circuit comprising a power bus, a common bus and a stabilized power bus, a quartz oscillator, consisting of p-channel and p-channel transistors, a quartz resonator, a trimmer capacitor and a feedback resistor, moreover, the source of the n-channel transistor is connected to the stabilized power supply bus, the p-KaH.iJTb transistor tags are connected to the common bus, the first pins of the trimmer and resistor trimmer and the quartz resonator1) oGp.gddshim, and connected to the combined gates of both transistors, the second terminals of the feedback resistor and the quartz resonator are connected to the combined drains of these transistors, which also connects the first output of the phase-shifting capacitor, the second terminal of which is connected to the common bus, blocking the capacitor, with the first output connected to bus stabilized power, the second terminals of the blocking and trimming capacitors are connected to a common bus, characterized in that, in order to expand the area of stable operation, Enabling self-starting and simplified manufacturing technology, a detection diode, an amplified p-channel transistor, a load resistor, a bias resistor, first and second integrating capacitors, a regulating n-channel transistor, and a leakage diode, the anode of which is connected to the gate of the n-channel regulator, are introduced into it transistor and to the first output of the first integrating capacitor, the second output of which is connected to the common bus, and the drain and source of the regulating n-channel transistor are connected respectively to the stabilizer bus The power supply and the power supply bus, the cathode of the leakage diode is connected to the first terminal of the load resistor and to the drain of the amplifying p-channel transistor, the source of which is connected to the common busbar, and the gate to the cathode of the detecting diode and the second integrating capacitor The second terminals of which and the second terminal of the load resistor are connected to the power bus, while the anode of the detecting diode is connected to the combined drains of the crystal oscillator transistors. 2, a stabilizer according to claim 1, characterized in that the load resistor and the bias resistor are made in the form of two additional n-channel transistors, the gates of which are connected to the common bus, the sources to the power bus, and the drains to the leak diode cathode and cathode detection diode, respectively. 3. Stabilizer according to claim 2, characterized in that a stabilized current generator and a reference n-channel transistor, the gate of which is connected to the source of this transistor, are introduced to the gates of additional n-channel transistors and connected to the first output of the stabilized current generator, the second output of which is connected to the common bus. 0t / e.Z