SU1450057A1 - A.c. to d.c. voltage converter - Google Patents

Abstract

The invention relates to converter technology and is intended to power low-power circuits in integrated circuits. The purpose of the invention is to expand the functionality by obtaining three voltages of various sizes at the output. The converter contains an input pin 1, a diode 2, three MOS transistors 3, 4.5, three output pins 6.8.10 and three load resistors 7, 9.11. When a variable voltage is applied to the input terminal 1 due to the inclusion of diode 2 at the drain of the VDP transistors 3,4,5, the presence of only negative half-waves Ug. At the source of the MOS transistor 3 there is a first output voltage, less than the input voltage by the cut-off voltage of the MOS transistor 3. Accordingly, the second output voltage at the source of the MOS transistor 4 is less than the first by the cut-off voltage of the MIS transistor 4 and more than the third the output voltage on the source of the MOS transistor 5 by the cut-off value of the MOS transistor 5. The number of MOS transistors can be reduced or increased. The device can be the basis for creating complex voltage conversion units. 2 Il. IC (L

Description

 ate

ate

I The invention relates to electrical engineering, in particular, to converting technology, and is intended to supply low-power circuits to power circuits.

The aim of the invention is to extend the functionality by obtaining at the output of three voltages of various sizes. A: Fig. 1 is a schematic of the converter of an alternating voltage constant-to-constant voltage transformer; figure 2 - experimental dependence of Ugj ,, on Ue, x

The AC voltage to DC converter contains an input pin 1 connected to the cathode of diode 2, the anode of which is connected to the drains of the first, second and third MOS transistors 3, I 4 and 5, respectively, and to the gate of the MIS transistor 3, I source and the substrate of which is connected I to the gate of the MIS transistor 4, the first I additional output terminal 6 I and one terminal of the first resistor H I whose second terminal is connected to the common bus. The source and the substrate of the MDPI-I transistor 4 are connected to the gate I of the MIS transistor 5, the first output I output 8 and one output of the second resistor 9, the second output of which I is connected to the common bus. The source and sub-terminal L of the DP transistor 5 are connected I to the second additional terminal 10; and one pin of the additional resistor 11 I whose second pin: is connected to the common bus.

The device works as follows.

The input variable to the voltage Ug is fed to pin 1. Due to the inclusion of diode 2, only negative half waves are present at the drain of the MOS transistor, To smooth out this voltage between the drain of the MOS transistor 3-5 and the common bus, you can turn on the capacitor (or you can turn on capacitors between the sources of MOS transistors 3-5 and the common bus). Since the negative voltage Ug is also applied to the gate of the MOS transistor 3, the negative voltage Up, is present at its source (output 6). This voltage is the first output voltage in the converter. Since a negative voltage is applied to the aatransfer of the MDH transistor 4, there is a voltage at its source (output 8)

Q

5 5

0 5 0 5

0

negative voltage Uppiy 11 ru -21), which is the second output voltage of the device. Since negative voltage Ue is applied to the gate of the NZdG transistor .5 (2Uo), a negative voltage is present at its source (output 10) Ugb, which is the third output voltage of the device, Depending on the specific technical requirements, the number n of MDD transistors in the converter can be reduced or increased, while the output voltage at the source of the last MOS transistor is equal to Ueb, v , n U8x-n U.

Thus, the device allows you to simultaneously receive several output voltages of different magnitudes, which are determined by the values of n, Uj, and Ugx. This device becomes the basis for creating more complex voltage conversion units, while the MOS transistors are can be connected with a common bus,

Claims (1)

Invention Formula Variable voltage converter. constant, containing three MOS transistors with an induced p-channel and the sources of the first and third MOS transistors connected to their substrates, and the gate of the first MOS transistor. connected to the drain of the third VDP transistor two resistors, the first terminals of which are connected to common bus, input terminal and output terminal, which is connected to the second output of the second resistor, characterized in that in order to extend the functionality by obtaining at the output three voltages of various sizes, A diode was inserted, the cathode of which is connected to the input terminal, and the anode to the drains. all three MOS transistors, two additional output pins 5, the first of which is connected to the source of the first MOS transistor, the second output of the first resistor and the gate of the second NDP transistor, and; additional resistor, the first output of which is connected to the second additional output output and the source of the third IDN 14500574 transistor, and the second output of the additional MOS transistor is connected to the gate, the resistor is connected to the common third MLP transistor and the second bus, and the source and substrate of the second terminal of the second resistor. V, " 10 15 th%, 5 Pf4a