SU1443186A1 - Analyzer of state of multiple-access channel - Google Patents

Abstract

The invention relates to telecommunications and Mob, used in the exchange of data between subscribers, inaccessible multiple access channel (KMD). The purpose of the invention is to reduce the analysis time, which provides an increase in the capacity of the KMD by reducing the transmission in case the KMD is simultaneously occupied subscribers KMD state analyzer contains an element And 1, a timer 2, a counter 10 In the analyzer entered a generator 3 clock pulses, three blocks 4, 5, 6 settings, three elements And 7, 8, 9, two counters 11, 12, element ШШ -NOT 13, element SHS 14. The proposed analyzer makes it possible to determine the state of the network as soon as possible. If a packet from two or several subscribers is overlaid, a signal is sent to stop the transmission without waiting for the end of the transmission of the imposed packets. 2 or less. iS

Description

The invention relates to telecommunications and can be used when exchanging data between subscribers, not using a multiple access channel (CMD),

The purpose of the invention is to reduce the analysis time, which provides an increase in the channel capacity of the multiple access channel by reducing the transmission in the event that the multiple access channel is simultaneously occupied by two or more subscribers

Fig. 1 shows a structural electrical circuit of the analyzer of Fig. 2, a structural electrical circuit of the timer.

The analyzer of the channel of multiple access (FIG. O contains the first element I 1j whose second input is the device input, timer 2.J generator 3 clock stubs the first unit 4 of the installation, the second unit of the installation, the third unit 6 of the installation, the second element I 7, the third element AND 8e quarter-element AND 9, the first counter 10, the second counter 11, the third counter 12, the element OR NOT 13, the element OR 14

Timer 2 (FIG. 2) consists of triggers 15-17, elements AND 18-20, AND-NO 21s OR 22, element AND-NO 23, and element AND 24 o

The analyzer works as follows.

Signals in the form of 1N pulses, corresponding to 1 x intersections, received by the process (signal {5 noise) of the threshold level (usually zero level) are fed to the input of the device. It is known that the number of imiuls corresponding to the crossing of the zero threshold is a functional ratio of signal energy and noise. With regard to the multiple access channel, the simultaneous transmission of two or more subscribers leads to the addition of their signals, which is equivalent to an increase in interference power and, consequently, an increase in the number of impulses corresponding to the crossing of the zero threshold. And this is greater: the greater the number of signals g t ev about subscribers5 simultaneously get access to the channel of multiple access about

In the initial state, timer 2, running on generator 3, starts

P-

to

15

20

 , 5 25 30

. 35

40

45

50

Blocks 4-6 are calculated for different installation resources by counters 10-12. Block 6 sets up a resource for counter 12 that matches the number of zero crossings for the presence of one subscriber in the network. Block 5 sets the counter to 11, a number corresponding to the number for the presence of two or more subscribers in the network. Unit 4 sets up a resource for counter 10, slightly exceeding the life of counter 11. In this case, counters 10-12 operate in tracking mode.

Zero intersection signals arrive at the second input of the first element I.

Each time the zero intersections arrive at the first AND element, they are then passed to the inputs of counters 10-12, which in this case work in the subtraction mode, therefore, the number of zero intersections at a given time is subtracted from the resources of these counters

If there is a signal from one subscriber in the network, then the contents of counter 12 becomes zero, and the contents of counters 10 and 12 are not equal to zero, therefore, a transmission prohibition signal is received from the output of counter 12. If the network simultaneously receives signals from two or more subscribers, the contents of counters 12 and 11 become zero, and the contents of counter 10 is not equal to zero, therefore, from the output of counter 11, a signal is received to cease transmission. If the network is free, then the contents of all the counters become equal to zero, since white pgum, which has the maximum number of zero intersections, arrives at the input of the analyzer. As a result, the signal from the output goes to the element OR-NOT 13, which gives the transmission permission signal. This process will be repeated depending on timer 2.

When two or more subscribers enter the network at the same time, the packets are superimposed, in this case, the known analyzer in this case spends the time required to transmit the superimposed packets that cannot be received, and only after that the Network busy signal is set.

The proposed analyzer allows you to quickly determine the 3. 1A43

the network and, if it processes packets from two or multiple subscribers, exposes a signal to stop transmitting without waiting for the end of the transmission of the superimposed packets.

Claims (1)

Invention Formula A multiple access channel state analyzer containing a serially connected timer and a first element I. A first counter, characterized in that, in order to shorten the analysis time, the first connected set unit and the second And element, whose output is connected to another input of the first counter, are entered, by 0 five 0 1864 therefore, the connected second installation unit, the third element AND, the second, the counter and the OR element, the third installation unit, the fourth AND element and the third counter, the OR-NOT element connected between the output of the first counter and the other input of the PI1I element, the clock generator, The first output of which is connected to the other inputs of the second, third and fourth elements I, and the second output is connected to the input of the timer, the second output of which is connected to the inputs of the first, second and third units of the installation, the output n The first AND element is connected to the other inputs of the second and third counters, and the input is the device input. R ag 2