SU1429108A1 - Four-input signle-digit adder - Google Patents

Abstract

The invention relates to computing and is intended for the construction of multi-operand high-speed arithmetic devices. The purpose of the invention is to simplify a four-input single-bit adder. The adder contains the elements COMPONENT BY MODULE 2 1-4 and elements AND 5-8, has inputs 9-12 and outputs 13-15. The speed of the adder, determined by the depth of the circuit, is equal to 3S, where G is the delay per valve, and the complexity is 17 in terms of the number of inputs to the logic elements. Binary variables x ,, x, x, Xq are supplied to the inputs, and logical outputs are realized at the outputs functions S, P |, P, corresponding to the sum, major and minor hypothesis signals. I nl. 1 tab.

Description

Order 5125/45

Circulation 704

Subscription

VNIIGTI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Claims (1)

the third first and second first and second that COMPOSITION ON MODULE 2 are connected respectively to the first and second inputs of the adder and the first and second inputs of the first element And, and the output is connected to the first input of the second element COMPOSITION ON MODULE 2 and the first input of the second element And, the output of which connected to the first input of the third element ADDITION BY MODULE 2, the output of which is connected to the output of the lowest adder transfer, the sum output of which is connected to the output of the second element ADDITION BY IODULE 2, characterized in that, for the sake of simplification, the total p contains the third and fourth elements AND and the fourth element COMPOSITION BY MODULE 2, the output of which is connected to the second inputs of the second element COMPOSITION BY MODULE 2 and the second element AND, and the first and second inputs are connected respectively to the third and fourth inputs of the third input house of the first house of the fourth element Й, which is connected to the output of the senior adder transfer. ADDITION ON MODULE 2, AND elements, the inputs of the first element of the adder and the first and second inputs of the third connected element of the element of the table. the AND element is found, the output of which is the first input of the fourth, and the second input is the third Four-input mator containing the first, second and sum35 x </ 9 x _g / 10 ^x ? /eleven x _4/12 S / 13 p, / 14 p _2/15 one one 3 .4 5 6 7 0 0 0 0 0 0 0 0 0 0 one one 0 0 0 0 one 0 one 0 0 0 0 one one 0 0 one 0 one 0 0 one 0 0 .0 one 0 one 0 0 one 0 one one 0 0 0 one Ό one one one one 0 one one 0 () 0 one 0 0 one 0 0 one 0 0 one 1429108 ⁴ Table continuation one 2 3 four Ί ---------------- 1 ⁵ 6 7 one 0 one 0 0 0 one one 0 one one one 0 one one one 0 0 I 0 0 one one one 0 one one 0 one one I one 0 one 0 one one one one one 0 one 0 Compiled by A. Klyuyev