SU1413542A1 - Device for digital measurement of frequency of slowly varying processes - Google Patents

Abstract

The invention can be used to measure processes, low speed, such as pulse rate, respiration. The device for digital measurement of the frequency of slowly varying processes contains an input driver 1, a generator (H) 2 sawtooth voltage, a peak detector 3 controlled by H 4, triggers 5,6 keys 7,16,16, pulsed G 8 reference frequency, differentiating circuits 9.18, comparator 10, sources 11.12, reference voltage, respectively, auxiliary capacitor 14, logical inverter 17, pulse counter J9. The device has an increased measurement accuracy, .2 з, п, ф-л, 6 Il.

Description

entrance

(L

FIG. one

The invention relates to an electrical measurement technique and is intended to measure the frequency of low-speed processes, such as lulse, breathing, etc.

The purpose of the invention is to improve the measurement accuracy and expand the range of measured frequencies.

Fig. 1 shows a functional diagram of a device for digitally measuring the frequency of slowly varying processes; Fig. 2 shows timing diagrams for the operation of the device; FIGS. 3-5 are functional curves, respectively, of a peak detector, a pulsed reference frequency generator, and a capacitor store, in FIG. 6, time diagrams explaining the operation of the capacitor magnets,

A device for digitally measuring the frequency of slowly varying processes contains an input driver 1, a generator 2 sawtooth voltage, a peak detector 3, a controlled generator 4, the first 5 and second 6 triggers, the first switch 7, the pulse frequency generator 8 of the reference frequency, the first differentiating circuit 9, comparator 10, first 11 and second 12 sources of voltage, store of 13 capacitors, auxiliary capacitor .14, second 15 and third 6 keys, logical inverter J7, second differentiating circuit J8 and pulse counter J9.

The sawtooth voltage generator 2 can be made, for example, on a reference capacitor 20, a current generator 21 and a circuit 22 on the reference capacitor.

The on-peak detector 3 may include, for example, an emitter follower 23, an analog storage device 24, a voltage relief device 25, and an OR element 26.

The pulse generator 8 of the reference frequency can be implemented, for example, on the counter 27 pulses, switch 28, generator 29. pulses, h dividers x 30-1-30-h pulse frequencies.

The capacitor store 13 may comprise, for example, a shift register 31, a logical unit generator 32, a controlled capacitor unit 33, a delay unit 34 made on the capacitor 35 and a resistor 36, and the control unit 33 of capacitors may

five . 0

5 o

0

five

d

five

five

This includes, for example, 1 parallel-connected branches, each j-branch consists of a series-connected co-sensor 37-j and a key 38-j, and the control inputs of the keys 38-1 to 38-2 are the corresponding inputs of the controllable block 33 capacitors, and the ends of all these branches are connected respectively to the output of a controlled capacitor unit and a zero potential bus.

The device works as follows.

The pulse sequence of the measured frequency is converted by the input shaper 1 (Fig. 2a) into short square pulses, the leading edge of which corresponds in time to the extreme value of each period of the process being studied (Fig. 2b). The first pulse from the output of the shaper 1 is fed to the trigger input 5 , cocking it, as well as being fed to the control input of the discharge circuit of the generator 2 of the saw-tooth voltage, will act on the latter, which leads to a quick discharge through it of the reference capacitance C in MOET2O

ment t, the output pulse of the driver 1 is also supplied to the control key, input 15, its closure, and through the logical inverter J7 to the control input of the key 16, open it, while the auxiliary capacitor 14 is charged before the voltage of the reference source P In addition, the impeller driver 1, arriving at the first input of the capacitor store 13, sets the potentials of the logical unit at the input of the parallel recording of the shift register 31 and through the delay time of the delay unit 34 enters the second control of the parallel recording. motor register 31 (fig.bv, i8 |, „c (34)). During this time, the joint operation of the pulses at the first and second inputs of the shift register 31 at its output establishes the levels of the logical unit, which, arriving at the control inputs the keys 38 of the capacitor unit 33 close the keys 38, and hence the first leads of the capacitors 37 to the zero potential bus, the second are connected to each other by the leads of the capacitors, being the output of the magazine 13 of the capacitors.

they are also connected to the zero-potential bus through a circuit 22 of the discharge of the generator 2 of the saw-tooth voltage. As a result, the capacitors 37 are discharged to zero. After the end of the pulse at the output of the imaging unit 1, the 22-bit circuit opens, the logical zero levels are set at the first outputs of the shift register 31, and consequently, the outputs of the generator 31 are disconnected, the auxiliary capacitor 14 is disconnected from the source 11 and the key 16 is connected to the reference {at the capacitor 20, the redistribution of charges on which leads to the establishment of the potential on them, defined by the expression

Crt

Ying (W) and

(f

CH

(one)

where and .. is the voltage at the output of the first source 11 of the reference voltage;

 - capacitors 14

Cjo and 20 respectively. Starting with the value of - U, the voltage at the output points of the generator 2 of the sawtooth voltage coincides with the sawtooth voltage, the beginning of generation of which coincides with the leading edge of the pulse at the output of the former 1. Thus, the accuracy of sawtooth voltage formation , especially for short times, at the output of generator 2 is significantly higher compared with the known device, for which the beginning of the formation of a sawtooth voltage does not substantially coincide with the beginning of the control pulse It also depends on the time required to discharge the device's capacitors. ,

With a large period of input pulses, the voltage at the output of the generator 2, linearly growing, reaches the voltage level U of the second source 12 of the reference voltage, while the comparator 10 at the time

t, triggered9

em, resulting in the second input of the store 13 of capacitors, and consequently, to the control input of the sequential recording of the shift peak detector 3 (FIG. 2e),

From the output of the controlled generator 4, a sequence of pulses is fed to the counting input of the second trigger 6 which is in the initial state of 50 SRI (the input voltage of the trigger 6 corresponds to the level of the logical unit), and the output pulses of the generator 4 received to the counting input of the trigger 6 are not can change

the horn 31 receives an impulse (FIG. bg; its state as long as

 . (13)), while the first bit of the shift register 31 is entered in a logical unit, the incoming

The input of the trigger setup 6 will not be equal to the level of the unit.

from the generator 32 of the logical unit to the input of the serial information of the shift register 31, while the key 38-1 is closed and the capacitor 37-1 is connected in parallel to the capacitors 14 and 20, the voltage at which at the time t abruptly decreases with voltage

equal to

 / 2)

i g ... + c. + Cjg

with, +

V

and the peak detector 3 is discharged to the same voltage by the action of a pulse of the comparator 10. In addition, the pulse of the comparator 10, arriving at the first input of the pulse generator 8, increases the counter code 27 by one, which corresponds to a change in the scale of representation of the period of the input sequence by a voltage q times.

If q is taken equal to two, then

  WITH,"

WITH,

 q S /

 go

V

s, -, ... CH

with +

eo

(3)

J9-1 e-i-l Ratio (3) allows you to select successively the capacitance values of capacitors Cjg.j-С, ..

The voltage of the reference capacitor 20, acting through the emitter

the repeater 23 to the input of the analog storage device 24 is monitored last and its output, which is the output of the peak detector 3 (FIG. 3), from which it arrives, to the input

controlled oscillator 4 with linear modulation characteristic. Forming pulses, the frequency of which (Fig. 2g) varies depending on the control voltage

peak detector 3 (FIG. 2e),

From the output of the controlled generator 4, a sequence of pulses goes to the counting input of the second trigger 6, which is in the initial state of the research institute (the input voltage of the trigger 6 corresponds to the level of the logical unit). The output pulses of the generator 4 coming to the counting input of the trigger 6, not can change

his condition as long as

his condition as long as

The input of the trigger setup 6 will not be equal to the level of the unit.

14135А2, etc.

15

At times t, t,.,., The output voltage of the trigger 5 changes from a zero level to a logic one level. In this trig--; 5 ger 6 gets the opportunity to work in the counting mode (i.e., the ability to change the state of the output voltage levels when pulses arrive at the counting input),

With the arrival of the first counting pulse from the output of the controlled generator 4 to the counting input of the second trigger 6, the output level of the voltage of the latter is reversed. The first impulse of generator 4 translates the second trigger from the state of an ogic unit to zero.

The second pulse from the output of the controlled oscillator 4, acting at the time t on the counting input of the second trigger 6, again flips it to the opposite (initial) state. The impulse generated at the output of the trigger 6 is differentiated by the differentiating circuit 9. The output impulse of the differentiating circuit of positive polarity at the moment of time tt arrives at the input of the zero setting of the trigger 3 and resets the trigger 5. 30 At the same time, the zero level from the output of the first trigger 5 (FIG. .2z), arriving at the installation input (level setting of the logical unit) of the second trigger 6, translates it into a state that is insensitive to clock pulses from the output of the pulse generator 4.

The impulse formed in such a way in the time interval at the output of the second trigger 6 (FIG. 2i) arrives at the second input (control) of the electronic key 7, opening it at the time of its operation. Through from 25

The covered electronic key 7 pulses arriving at the first input of the last 45 i from the output of the reference frequency generator 8 pass to the output of the electronic key 7 (Fig. 3l) until it closes at time t after the pulse has expired - 50 trigger course 6.

Thus, the electronic key 7 is open for a period of time or for a time equal to the period of the pulses at the output of the controlled generator 55.

The number of these pulses is proportional to the measured frequency of the process.

for and sy us ui poo pi po for ho

And he is from the same class.

in him ca we are not

po no poo

F

on h

i

The voltage at the output of the analog storage device 24 (FIG. 3) and at the output of the peak detector 3 is reset at time t through the device 25 by resetting the last positive pulse from the output of the differentiating circuit 9 (FIG. 2k), after which the voltage at the output of the analog storage device 24 and at the output of the peak detector 3 again repeats through the emitter repeater 23 the linearly varying voltage from the reference capacitance 20 of the sawtooth generator 2, in addition, after each the operation of the comparator JO (Fig. 2b) produces a similar reset of the peak detector 3..

Used to measure the first and second output pulses of the pulse generator 4, comprising its period Tj. The following time interval t is set, the stationary mode of unit 4 is established. Since the time interval of the pulse following the time t is used for measurement, this pulse generator 4 does not require synchronization of the peaks of the controlled voltage of the peak detector output pulses of a relaxation generator.

The proposed device for digital measurement of the instantaneous frequency of a pulse sequence differs from the known higher accuracy, especially in the high frequency range, since the measurement of the period of the output pulses is performed. between the same edges of the input pulses, and the processing time does not affect the measurement result.

i

Due to the switching of the capacitors of the magazine J3, the range in the low frequency range expands. When the code of the counter 27 changes, the frequency at the output of the generator 8 pulses changes q times.

Claims (3)

Invention Formula J. Device for digital measurement of the frequency of slowly varying processes auth.St. No. 930J44, characterized in that, in order to increase measurement accuracy and increase71 the measured frequency range, a second capacitor, a second and a third switch, a logic inverter, two reference voltage sources, a comparator, a capacitor store, a second differentiating circuit, a pulse counter, are entered in it, the first output of the second capacitor is connected to the output of the reference voltage source through the second key, connected by its control input to the output of the input driver, to the input of the logic inverter and to the first input of the capacitor store, the output of which is connected to the output of the saw generator different voltage, the first input of the comparator and the information input of the third key connected to its control input with the output of the logic inverter, the output of the second key is connected to the first output of the second capacitor, the second output of which is connected to the zero potential bus, the output of the second source of the Reference voltage It is connected with the second input of the comparator, connected by its output with the second input of the capacitor store, with the additional input of the peak detector and with the first input of the pulse frequency reference generator , The second input of which is connected to the output of the first differentiating circuit, the second input of the differentiating circuit is connected to the output of the first flip-flop and its output coupled to the reset input of a counter, coupled to its clock input with the output of the first key, wherein the counter output is the output device, 2, The device according to claim 1, about tl and - the fact that the capacitor store contains a shift register 428 logical unit generator, delay unit and controlled capacitor unit, the control inputs of which are connected to the corresponding outputs of the shift register, the shift input of which is the second input of the capacitor store, the output of which is the output of the controlled unit capacitors connected by their second output to a zero potential bus capacitors. 3. A non.J device, characterized in that the pulse frequency generator comprises a pulse generator, a switch, frequency dividers, a pulse counter, a clock input and a reset input of which are respectively the first and second inputs of a frequency pulse generator, the output of which is the output of the switch connected by its control inputs to the corresponding outputs of the pulse counter, the output of the generator is connected to the first of the information inputs of the switch, the remaining information the inputs of which are connected to the outputs of the respective divides to it (frequencies connected in series to a circuit in which the input of each subsequent frequency divider is connected to the output the previous one, and the input of the first frequency divider in the chain of successively connected frequency dividers is connected to the output of the pulse generator. avh Ш2), bykh fi (iO) "Out um) a {s} v / x aft /) d / x ) You f (6} You/ f & ЫХ and (7) Out / breathing III Hi il L 1 I LlllUllllllilllllllllllillill 1111 i I 2 MMUIlUl n P t t Th and il t -9k- t to Well t - t .J fie.Z FIG. H ue.S