SU1413537A1 - Method of balancing digital extremum a.c. bridges - Google Patents

Abstract

This invention relates to electrical measuring technology. The method of balancing digital extreme bridges of alternating current is implemented in a device comprising a power generator 1, a pavement measuring circuit 2, a selective amplifier 3, a tCRp 4 increment detector, a modulator 5, a generator of 6 clock pulses, a counter 7, a group of elements AND 8, a register 9 memory, group of elements OR 10, modulation limiter 11, recess signal generating unit 12, comparison and storage units 13 and 14, respectively. At the beginning of the equilibration process at a zero value of the controlled parameter, the output signal of the bridge measuring circuit is bounded below by a level not exceeding the amplitude of the voltage of this signal; The voltage amplitude of the current output signal of the bridge measuring circuit is compared with the voltage value obtained above, and if these values are equal or previously obtained, increase the adjustable parameter by the value of 2Ak -A where A is the weight of the k-ro discharge; l - step junior bit. The speed of the balancing process is increased. 3 il. with S (L 00 SP with m

Description

The invention relates to electrical measuring technology and can be used in digital automatic bridges for measuring parameters of capacitive, inductive, resistive and other sensors in control and regulation systems for technological processes and automated research.

The purpose of the invention is to increase the speed of the balancing process.

FIG. I shows a block diagram of a digital extremum AC bridge; in fig. 2 - the algo rhythm of balancing the bridge measuring circuit; in fig. 3 is a diagram illustrating the order of balancing a bridge measuring circuit for a three-bit adjustable measure with weights in binary code.

In the scheme of a digital extremal bridge for implementing the proposed balancing method, power generator 1, bridge measuring circuit (MIC) 2, selective amplifier 3, increment detector 4, modulator 5., clock generator 6 (GTI), counter 7, element group And 8, a memory register 9, a group of elements OR 10, a P modulation limiter, a recess signal generating unit 12, a comparison unit 13 and a storage unit 14.

FIG. 2 and 3, the following notation is accepted: P,, P, ..., Py, are the values of the adjustable parameter after the 1st, 2nd, ..., nth balancing measures; A, A2, ..., A are the weights of the 1st, 2nd, ..., nth bits of the adjustable carameter (1st level is the highest); A is the step of the junior bit of the regulated parameter; U is the amplitude value of the output signal of the MIC corresponding to the zero value of the regulated parameter, U is the modulation level of the output signal of the bridge measuring circuit; and - the amplitude of the signal at the output of the increment detector at the zero value of the controlled parameter; K is the resulting transfer coefficient of the channel of the nonequilibrium signal (the resulting transfer coefficient of the selective amplifier and increment detector) of the bridge; U, U, ..., U are the amplitudes of the signals at the output of the increment detector after the 1st, 2nd, ..., nth probe actions; T,, 1 ,, ..,, T -

1st, 2nd, ..., nth steps of balancing; and and and - the current amplitudes of the signals at the outputs of the MIC and the increment detector; Р ,, is the measured parameter, t is the time.

Before starting the YI balancing process, setting the bridge back to its original state. For this, at the first output of the GTI 6, a pulse is formed which goes to the reset inputs of counter 7 and register 9, as a result of which the output codes of counter 7 and register 9 are set to zero, and therefore, the adjustable parameter (P (, 0) MIC 2. At the same time, the output signal of the MIC 2 takes the value U ,, From the first output of the GTI 6, this pulse also enters the input of the recess signal generation unit 12. In block 12, in accordance with the level U, a signal is generated at its input, which is fed to the control input The reader 1I sets the level and limits of modulation of the output signal Up 1 of MS 2. In this case, the level and restriction modulation of the signal Uj is set so that the condition is satisfied, the level and restrictions are maintained for the next balancing cycle of ICC 2. From the output of the limiter 11, the signal and ,, limited to the bottom of U, (and Ug-U), leads to the input of the increment detector A, where it is rectified, and is fed to the inputs of the comparison unit 13 and the storage unit 14. After that, the third output of the GTI 6 generates a pulse, which enters the memory block 14, and the amplitude and output signal of the detector 4 is stored in this block. Modulation limiter 11 has the function U f () to achieve the limitation of the AC signal below. Such a conversion function is, for example, stabilized nitrile stabilizers, through which the AC signal is passed. By adjusting the number of zener diodes connected between the MIC and the selective amplifier, it is possible to regulate the magnitude and, therefore, the modulation amount of the MIC output signal. Due to the modulation limitation of the AC signal, the

the amplitude of the ac signal at the input of the selective amplifier without reducing the sensitivity of the MIC to the modulation increments of the adjustable parameter, i.e. without decreasing the magnitude of the amplitude increment of the MIC non-equilibrium signal, the arrival of one per unit discrete increment of the controlled parameter,

Then, the balancing cycle of MIC 2 is performed.

The logical values of the bits of the adjustable parameter MIC 2 are determined alternately, beginning with the highest.

The adjustable parameter MIC, 2 has a maximum value corresponding to twice the value of the maximum range of variation of the measured parameter. At the same time, each discharge of the regulated measure has a weight with a double value.

The modulator 5 is connected to the MIC 2 and continuously subtracts one quantum 4 from the current value of the controlled parameter.

In the first cycle T, the balancing from the second output of the GTI 6 to the counting input of the counter 7 receives the first pulse and in the first (senior) discharge of the counter 7 a single signal (potential) appears, which through the first element of the group of elements OR 10 turns on the first (senior ) the discharge of the adjustable parameter MIC 2. At that, the adjustable parameter, taking into account the deduction by modulator 5 of one quantum A, receives a trial increment by

Ro + 2A, (2A, -1) l,

where

The same single signal from the first bit of the counter 7 will enter the first input of the first element of the group of elements And 8.

As a result of the trial increment produced (4), the output signal of the MIC 2 is incremented. The output signal and the RSMS 2 is limited in amplitude in limiter 11, then it is output in detector 4 and fed to block 13, in which the comparison of its amplitude with amplitude Uf is complete memorized signal in block 14.

If after the trial step (1) the amplitude of the stored signal U in block 14 is greater than or equal to the amplitude

 jO

}five

20 25

I3537

signal

thirty

35

and. detector output 4

(), then a pulse is formed at the output of the comparison unit 13, which is fed to the second inputs of elements of a group of elements AND 8 and through the first AND element (since there is a single signal at the first input of the first element And) is written to the first input of memory register 9. From the first output of register 9 memory, a single signal through the first element of the group of elements OR 10 enters the most senior (first) bit of the adjustable parameter MIC 2 and keeps it in the on state (i.e., the first bit is 1).

If, as a result of the trial increment (1) produced, the output of comparison unit 13 does not generate a pulse, and the first bit of register 9 of the memory remains in the zero state, and therefore, the first bit of the controlled parameter MIC 2 takes on the value O.

In the second cycle, T. balancing, from the second output of the GTI 6, the second pulse arrives at the counting input of counter 7 and, at the output of counter 7, a single signal shifts from the first (senior) bit to the second. In this case, a single signal through the second element of the group of elements OR 10 turns on the second bit of the adjustable parameter MIC 2 and a test action is carried out

(2)

P, + 2A, + (2A2-1) L,

40

where Р, РО or Р Рц + 2А - Д depending on what value is received, the first bit of the regulated parameter after the first equilibration step (O or I).

,

0

five

AT

on

in accordance with the amplitude U. detector output 4 relative to U, the second bit of memory register 9 receives a single (at) or zero (at) state, and therefore the second bit of the adjustable parameter MIC 2 is fixed at 1 or O.

Similarly, the rest of the balancing cycles are performed.

The process (cycle) of Balancing is completed for PJ, cycles equal to the number of bits of the adjustable parameter MIC 2. Upon completion of the balancing process, the value P of the controlled parameter will be twice the value of the measured parameter P, i.e. The MFA will be separated from the equilibrium point by an amount, and the output code of memory register 9 will correspond to the value of the parameter being measured.

X

With

this value R. / 2

AND

adjustable parameter. it will differ from the value of the measured parameter by no more than ± 0.5D, i.e. the balancing error will not exceed 0.5D.

FIG. Figure 3 shows the equilibration diagram of the MIC for a three-bit adjustable parameter with dimensions of bits 2A |, -L and weights A in binary code. The diagram is presented for a specific value of the measured parameter.

According to the proposed method, after each k-ro test action, the amplitude of the output of the preliminarily wise signal Uj is compared, the IC value of U and the control effect is fulfilled according to the result — the k-th bit is set to zero or one value. As a result, each control action can be performed simultaneously with a subsequent test action (i.e., the control action of T can be combined, but in time with the test impact of T.), and therefore the duration of the balancing tact

can be approximated to two times less compared with the known method. In this case, the modulation limitation of the output signal of the MIC is equal to the level of the front.

sUn makes it possible to analyze

.

the increment sign of the MIC output signal (the sign of the increment of the signal at the detector output) before the end of the transient process in the selective amplifier and further reduce the duration of the balancing stroke, and hence the duration of the balancing process. So, with) (.- r and permissible error of setting the voltage at the output of the selective amplifier after the test step, you can analyze the sign of the imbalance of the imbalance signal over time t

 1p.

 .

at the decay constant of the selective amplifier, and with () the increment sign can be analyzed

Where

Equivalent

14135376

immediately after the fulfillment of the trial step (the transients in the MIC are neglected, since their duration is disproportionately shorter than the duration of the transient process in the selective amplifier) .- Since according to the proposed method 2-U,

ost

ten

less than increments of voltage JP

and and up by a known method after

15

20

25

45

gQ

trial and regulatory actions, the proposed method allows to significantly reduce the duration of transients in the selective amplifier, and therefore, the duration of the balancing stroke and, as a result, the duration of the balancing process.

Claims (1)

Invention Formula The method of balancing digital extreme bridges of alternating current, consists in the fact that the process of balancing begins with a zero value of the controlled parameter, its logical values. The bits are determined alternately, starting with the highest one, in each k-M (, 2, ...) cycle, balancing the trial (modular) effect is formed by a stepwise increment of the controlled parameter by (2A) l, where A | - the weight of the k-ro bit, the value of which is determined; E - step of the next discharge, characterized in that, in order to increase the speed of the equilibration process, at the beginning of the equilibration process at a zero value of the controlled parameter, the lower measuring signal of the bridge measurement circuit is limited to a level not exceeding the amplitude of the voltage of this signal, Vtr ml formed signal and remember its voltage value, and after each trial exposure compare the voltage amplitude of the current output signal of the bridge measuring circuit with a voltage value of an undoubted signal, with an adjustable pair of 35 l ti 55 the meter is increased by the value of 2A, j d only if the voltage value of the stored signal is greater than or equal to the voltage value of the stored signal at zero value of the adjustable parameter of the bridge measuring circuit. About 1 (Uo-Unj-H U v Po 0 -Po (2Ai 1) A / Po U af / P2 Pt i (2A2-1) L  U  / , .. Rp-1 (2Ap-1) L  Rp -Pn-1-2Apd. 4z FIG. 2 f Vi Uo UM I I I ABOUT f tJ ( u, l Fi.Z