SU1390748A1 - Method of controlling self-excited inverter with pulse-width modulation - Google Patents

Description

(21) 4131045 / 24-07

(22) 10/08/86

(46) 04.23.88. Bul Number 15

(71) Kirov Polytechnic Institute

(72) A.N. Golovenkin and A.P. Protasov

(53) 621.316.727 (088.8)

(56) USSR Copyright Certificate No. 995258, cl. H 02 H 7/48, 1981.

Zyubin V.F. Discrete control systems for autonomous inverters with an IMI according to a nonlinear law. - Electrical Engineering, 1974, No. 11, p. 43.

(54) METHOD OF MANAGEMENT OF AUTONOMOUS INVERTER WITH LATITUDENT IMPULSE MODULATION

(57) The invention relates to electrical engineering and can be used in control systems for autonomous inverters with pulse-width modulation of automated AC drives. The aim of the invention is to increase the accuracy of the conversion of the output sinusoidal voltage. For this, on each half-period of sinusoidal voltage, n time intervals are formed, where n 2, 4, 6, ..., inside each of which a control impulse is formed, control impulses are formed symmetrically with respect to the middle of the half-period, and their duration is modulated according to a sinusoidal law, in this case, in the first half of each half-period, the instants of the end of the formation of each interval and the corresponding control pulse are combined, and in the second half of each half-period, the instants of the beginning of the formation of each injection ervala and the corresponding control pulse. 5 il.

with

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The invention relates to electrical engineering and can be used in control systems for autonomous inverters with a latitude of pulse modulation of automated AC electric drives.

The purpose of the invention is to improve the accuracy of the conversion of a sinusoidal voltage.

FIG. 1 is a diagram explaining the proposed method with n 8} in FIG. 2 is a block diagram of a device implementing the proposed method in FIG. 3 is a diagram illustrating the operation of the device with n 8; Fig. 4 is a block diagram of an element of time modulation of control pulses; in fig. 5 - schematic diagram of the power part of the inverter.

A device for implementing the method comprises successively connected master oscillator 1 of short pulses, a divider 2 frequencies, a counter 3, a first input of a digital comparator 4 and a delay element 5, a temporal modulation element 6 of control pulses, the counting input of which is connected to the outputs of a master oscillator 1, the control input - with the output of the splitter 2 frequency, and the output - with one of the inputs of the reverser 7, the other input of which is connected to the output of the splitter 2 frequency, the control input - with the output

the delay element 5, and the outputs — with the inputs of the RS flip-flop 8. The output of the RS flip-flop is intended for connection to the input of the inverter 9, the output of the delay element 5 is intended for connection with the control input of which.

A device for implementing the method works as follows.

At the output of the master oscillator 1, a sequence of filling pulses f is formed, which is fed to the input of the divider 2 and the counting input of the element 6 of the time module and the control pulses. At the output of divider 2, a sequence of pulses is formed with a frequency f „„ 2nf, where f is the frequency of the output sinusoidal voltage of the inverter, n 8 is the number of intervals into which half the period of the output voltage is previously divided (Fig. 1).

Int

by

The pulse rate with frequency f steps on one of the inputs of the reverser and simultaneously on the triggering input of element 6.

ten

j

35

40

l about 50 about

The time modulation element 6 of the control pulses can be allocated based on the memory block and the decoder. Item 6 contains a memory block 10 connected to the decoder 11, to the control input of which the output of the counter is 12 intervals, and the output of the decoder is connected to the information input of the counter 13.. Element 6 works as follows. The pulse sequence with frequency f yj 2nf, coming from the output of divider 2 frequency, is fed to the counting input of counter 12, the output of which forms the code of the interval pulse number Ny, which is fed to the control input of the decoder 11. In this case, the counter 12 counts from 1 to pi Each of its output codes at the output of the decoder corresponds to a code defining the time delay for the formation of a given pulse. If we take the moment

25 of the arrival time of the U-ro pulse at the beginning of the i-ro interval, then at the output of the decoder at each time point there is a code N of the pulse delay duration corresponding to the NJ number of the interval. At the same time, in the first half of the half-period, the code value Nj corresponds to the number determined as a particular T, - - tN - / t j, j, a in the second half 20

45

55

as quotient tN ./t, rounded to integers.

At the time of arrival of the U-ro pulse, a code is written over the duration of the pulse delay in the i-th interval into the counter 13, from where the recorded information is immediately. reads up to a nud sequence of pulses f | filling, coming from the output of the master oscillator 1 (Fig. 2). At the moment of the end of the reading, a pulse is formed at the output of the counter 13. The output of the counter 13 is the output of the element 6 and is connected to one of the inputs of the reverser 7 (Fig. 2).

The formation of a pulse at the control input of the reverser 7 occurs as follows. The pulses f, received from the output of divider 2, are periodically combined in counter 3 from 1 to n, at the output of which the code of the interval pulse number N is generated. Digital comparator 4 compares the input

current code number N pulse interval, coming from the output of the counter 3, and the reference arriving at the second input of the comparator 4 and the corresponding number Ng p / 2. The comparator 4 has at its output a zero state, if N ,, / N ,, and a single one, if Ny N. In this case, the transition from the zero state to the single state occurs at the moment of arrival of the pulse with the number N y n, and from the single state to zero - at the moment of arrival of the pulse with the number Ny p / 2. In element 5, at the input of which a pulse comes from the comparator 4, the time and edge of the output signal of the comparator 4 are shifted. In this case, the time edge of the signal is selected by a larger pulse delay in the interval with number N, n in element 6, the cutoff delay is greater pulse delay in the interval with the number N p / 2. The duration of the front and slice delays is limited by the duration of the intervals. The signal from the output of the delay element 5 is fed to the control input of the reverser 7. In this case, with a single control signal, the output pulse of the element 6 is fed via the reverser to the triggering S input of the RS flip-flop 8, and the interval pulses to the resetting R input. With a zero control signal, the order of passage of pulses from the output of element 6 and interval pulses is reversed, i.e. from the output of element 6, the pulses arrive at the R input, and the interval pulses go to the S input of the RS flip-flop 8.

The control pulses from the output of the RS flip-flop 8 are distributed in the inverter 9. The inverter consists of a controlled distributor of 14 pulses, a control signal generating unit 15, matching elements 16 and 17, a power section of the inverter 18 consisting of key elements 19-22.

The information input of the distributor 14 pulses a signal, supplied from trigger 8, to the control input, the signal comes from the output of block 15, and the two outputs of block 14 are connected respectively to two matching elements 16 and 17, from each of which the signal goes to control inputs two key elements of the shoulder two-phase bridge inverter 18. Inverter 9 operates as follows. The control pulses from trigger 8 arrive at the information input rac- f. 14 pulse limiter. Depending on the state of the control signal, signals from the information input go to one or the other output of block 14. Thus, at each Q given moment, one of the two outputs of block 14 and respectively one of the two channels of the inverter 18, for example, a channel, consisting of 43 elements 16, 9, and 22. The harmonic-connected elements 16 and 17 serve to amplify control pulses and galvanic isolation. In the key elements, in the role of which transistors 19-22 play a role, further Q amplification of control pulses takes place

power. When the control signal at the input of block 14 changes, the previously operated channel closes and another channel of the inverter 18, 5 enters. the channel consisting of elements 17, 20, and 21. Block 15 operates in the T-flip-flop mode and the change of the control signal at its output has occurred. It occurs at the moments when the signal from the output of element 5 changes from zero to one (Fig. 3), i.e. at time points close to K. When the control signal of block 14 is changed, neither the shape of the control pulses nor the order in which they are followed changes. Only the polarity of the voltage at the output of the inverter 18 is changed. Thus, the symmetry of the output voltage relative to the THC points is provided.

The width of the sinusoidally modulated control pulses can be determined depending on the purpose of the transformation. The width of the pulse, in each interval, into which the sinusoid of the output voltage is previously divided, can be determined from the following relations

0

0

five

0

 And siiKdt dUt; ., l)

 1l

(one)

(2)

12, ...,

the number of intervals into which the sinusoid half period is divided

output voltage; the number of the interval within the half period;

A is the amplitude of the sinusoidal voltage, subject to the pulse width modulus da (PWM);

and - the angular frequency of the sine-voltage; pulse amplitude PWM; the duty cycle of the modulated pulse in the interval, the duration of the modulated pulse in the interval N., From the expressions (1) and (-2), the magnitude of the duration of the modulated pulse in the interval can be determined.

Ti-Alcos /n(N.-l) second cos-- ..-. sz)

7

ten

15

.

p so and

The modulated pulses of space are located within intervals symmetrically to the middle of the half-period of the output sinusoidal voltage, which allows us to exclude the harmonic voltage that is a multiple of two from the 1 N output sinusoid.

The formation of control pulses symmetric about the middle of the half-period and not symmetrical about the mid-1 interval at a given frequency of filling pulses f reduces the conversion error of the modulated control pulse by at least 2 times, since the number of filling pulses can be any number of natural numbers, including odd and eliminates the need to spend time on changing the order of the pulse counting within each interval. The relative error of the transformation of each modulated pulse is equal to

L where f

 p-TTsrnli72n I2TN.-T) + 13

- discrete transform

(WITH),

T is the period of the output voltage of the inverter (C). It can be seen from the formula that the accuracy of the transformation significantly decreases with an increase in the number of time intervals into which the sinusoid is broken, with a decrease in the interval number, and is inversely proportional to the discreteness of the transformation. Since the resolution of the transformation is equal to the known method

WITH

24 ..

n

; and for the proposed

/ 1 .рп. 3

where t

p. 3

zap. with

pulse replenishment duration;

the time required to change the order of pulse counting within each interval, the accuracy of the proposed method is increased in comparison with the known

five

0

five

0

five

in 2-t (. times

Improving the accuracy of the conversion of sinusoidal voltage in autonomous inverters with PWM provides a more efficient use of power electrical equipment in AC drives, since this increases its efficiency and power factor.

Claims (1)

Invention Formula The method of controlling an autonomous inverter with pulse-width modulation, is that at each half-period of sinusoidal voltage, n time intervals are formed, where, 4, 6, ..., inside each of which a control pulse is formed, and the control pulses form symmetrically relative to the middle of the half period, and their duration is modulated according to a sinusoidal law, characterized in that, in order to increase the accuracy of the conversion of the sinusoidal voltage, in the first half of each half period the sinusoidal In the second half of each half-period, the starting points of the formation of each interval and the corresponding control pulse are combined. I 11 I  2 3 iwm I I I I I I I I I I I I I I I I -. and out} g and Feces 11 I I I I 11 J and V / x and breathing 5 and Vsh, 7 II I I M I I I I I I M I I I / I I I I I I I I I I I I I I I I and Sbixb nnni-innn nnni-innn t Byyh9 (ifet / xfej 1PPPPP I I I ll luuunmr 0US.3