SU1390572A1 - Device for monitoring voltage - Google Patents

Abstract

The invention relates to electrical measurements. The voltage control device contains a pulse generator 1 consisting of a CMOS trigger, two diodes, two resistors and two capacitors, resistors 2-4, comparator 5, input buses 6 and 7, respectively, of the first and second monitored voltages bus 8. The device has enhanced functionality by providing control over the relative change of two voltages. 1 hp f-ly. 2 Il.

Description

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The invention relates to electrical measurements and can be used to monitor voltage.

The purpose of the invention is to enhance the functionality by controlling the relative change of the two voltages.

FIG. 1 shows a functional diagram of the device; in fig. 2 is a dielectric circuit of a pulse generator.

The voltage monitoring device (Fig. 1) comprises a pulse generator 1, a first 2, a second 3 and a third 4 resistors, a comparator 5, input buses 6 and 7, respectively, of the first and second monitored voltages and output bus 8.

The first input of the comparator 5 through the first resistor 2 is connected to the power input of the generator 1, the input bus 6 of the first monitored voltage through the second resistor 3, the first input of the comparator 5 is connected to the output of the pulse generator 1, and through the third resistor 4 to the common bus 5 is connected to the input bus 7 of the second controlled voltage.

Pulse generator 1 (. 2) contains a 10H trigger, 9, first 10 and second 11 diodes, first 12 and second 13 resistors, first 14 and second 15 capacitors, and output terminal 16.

The first terminals of capacitors 14 and 15 are connected to the common bus, the second terminal of the first capacitor 14 is connected to the first input of the trigger 9, the anode of the first diode 10 and through the first resistor 12 to the cathode of the first diode 10, the forward output of the trigger 9 and the output terminal 16, the second output The second capacitor 15 is connected to the second input of the trigger 9, the anode of the second diode 11 and through the second resistor 13 to the cathode of the second diode 11 and the inverse output of the trigger 8, the power input of the latter is the power input of the generator 1 (not shown).

The device works as follows.

The pulse generator 1 produces square-wave pulses, the amplitude of which is equal to the controlled voltage on the bus 7, and in the pause - to zero. The specified property of the pulse generator 1 is provided

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picking it up on the base of KMuIl trigger 9, the ratios of resistors 2-4 are chosen so that the first input of the comparator, 5 receives voltage pulses, the upper value of which corresponds to the upper limit of the tolerance field of the first controlled voltage. The second input voltage is fed to the second input of the comparator 5.

In the event that the input voltages are relative to each other in the tolerance field, the output of the comparator 5 and the input bus 8 of the device, respectively, generates direct impulses with a frequency equal to the pulse frequency from the output of the generator 1 of pulses, and at the exit of one or two input monitored voltages up or down from the tolerance field at the output of the comparator 5, a constant voltage is formed equal to the corresponding high or low logic level.

Claims (2)

1. Voltage monitoring device containing a pulse generator, three resistors and a comparator, the first input of which is connected to the input bus of the first controlled voltage through the first resistor, and the second input of the comparator through the second resistor to the input bus of the second controlled voltage and the comparator output is the output of the entire device, characterized in that, in order to extend the functionality by controlling the relative variation of the two voltages, the first input of the comparator is connected via a third resistor to the common bus, and the power input of the pulse generator is connected to the input bus of the first controlled voltage tension 2.-The device of claim 1, about tl, which is that the pulse generator contains a CMOS trigger, the first and second diodes, the first and second resistors and the first and second capacitors, the first terminals of which are connected to a common bus, the second output the first capacitor is connected to the first input of the trigger, the anode of the first diode and through the first resistor to the forward output of the trigger and the cathode of the first diode, the second output of the second capacitor is connected to the second input of the trigger, the anode of the second diode and through the second resistor with the inverse trigger output and the cathode of the second diode, and one of the trigger outputs is the output of the pulse generator. FIG. 2