SU1389010A1 - Device for contouring interferogram patterns - Google Patents

Abstract

This invention relates to a TV technique. The purpose of the invention is to improve the quality of contouring by reducing high-frequency noise. The device contains 1 to 3 differentiation units, adders 2 and 4. High-pass filters 5 and 6, low-pass filter 7, comparator 8, delay block 9, frequency detector (RR) 10, controlled by r-11 pulses, D

Description

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flip-flops 12–15, distributor 16. pulses, elec I 17, adder 18 with weighted inputs, consisting of resistors 19-22 and adder 23. G-11 produces pulses, the frequency of which determines the blocking interval. RR 10 generates a control for the voltage of rr 11 proportional to the frequency of the interference fringes in the image, which ensures the dependence of the frequency on the nature of the image being processed. With an increase in the spatial frequency of the interference fringes, the proportion of high-frequency components at the output of block 1 increases, i.e. the voltage increases at the output of the BF 10. Consequently, the frequency at the output of r-11 increases and, accordingly, the duration of the blocking pulses decreases. At the adder 18 will pass higher-frequency signals from the comparator 8. 3 Il.

The invention relates to a technique of television and can be used to improve the quality of low-contrast images, in particular images of interferograms.

The purpose of the invention is to improve the quality of contouring by reducing high-frequency noise.

FIG. Figure 1 shows an electrical block diagram of a device for contouring the images of interferograms; in fig. 2 and 3 are time diagrams that show his work.

. The device for contouring images of interferograms (Fig. 1) contains the first differentiation unit 1, the first adder 2, the second differentiation unit 3, the second adder 4, the first 5 and the second 6 high-pass filters, the low-pass filter 7, the comparator 8, the delay block 9 , frequency detector 10, controlled pulse generator 11, first 12, second 13, third 14 and fourth 15 D- triggers, distributor 16 pulses, element 17, adder 18 with weighted inputs, consisting of resistors 19-22 and adder 23 .

A device for contouring the images of interferograms works as follows.

The input video signal is differentiated in the differentiation unit 1 and is fed to the input of the first adder 2, to the other input of which the same video signal passes through the first high-pass filter 5. At the input of the second differentiation unit 3, a signal is formed (Fig. 2a).

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which, after differentiation, is transformed into a form (Fig. 2b). As a result, at the output of the second adder 4, a significant increase in the fronts is observed (Fig. 2c), which leads to clearer contouring of the bands — an image of the interferogram.

Comparator 8 provides even higher signal contrast, with a contouring signal for even greater suppression of background imbalance; produced by the comparator 8 as a difference signal between the signal coming from the first 1 and second 2 differentiation units, and the signal coming from the filter 7, which extracts the low-frequency component of the video signal's envelope.

With a double differentiation of the video signal, not only border delineation occurs, but also high-frequency noise is emphasized. Detuning from these noises is performed next time. The signal from the output of the comparator 8 enters the C-inputs of the first 12, second 13, third 14 and fourth 15 D-flip-flops and records its impulses from the outputs of the distributor 16 to their D-inputs on its leading edge. From the timing diagram of the operation of the distributor 18 (Fig. 3), where the signal at its input (Fig. 3 a) and its four outputs (Fig. 3 b, c, d, d) is shown, it is clear that at the D input of one of D-flip-flops 12-15 at the appropriate time is given a logical zero signal, which will be recorded in the corresponding D-flip-flop along the leading edge of the pulse received from comparator 8. The output signal of the corresponding D-flip-flop blocks And 17, preventing impulse from passing from comparator 8 to the input of the adder 18. Block 9 delay applied for the purpose of delaying impu comparator 8 for the time required to trigger the first 12, second 13, third 14 and fourth 15 D-flip-flops, so that short parasitic spikes do not form on the output of the And 17 element. The blocking of element And 17 will continue until the corresponding B-trigger, which is in the zero state, will not be transferred to the single state by the pulse received at its S input from the distributor 16, i.e. after three cycles of operation of the controlled generator 11. After removing the blocking, the output signal from the comparator 8 is fed to the input of the adder 18. If the duration of the output pulse of the comparator 8 is less than the duration of the three cycles of the generator 11, it will be completely blocked by AND 17 element. To exclude the passage of a short impulse from comparator 8, received at the moment before unlock from element 17, is another corresponding D-flip-flop that will block. In this case, at the leading edge of this short pulse, a logical zero level will be recorded, which will block its passage. Obviously, with an increase in the number of D-flip-flops and an increase in the frequency of the controlled oscillator 11, the accuracy of setting the duration of the blocking pulse increases. It was determined experimentally that four D-triggers are enough.

Thus, high-frequency noise filtering is performed. The controlled oscillator 11 generates pulses whose frequency determines the blocking interval. Frequency detector 10 generates a control voltage for the controlled oscillator 11, proportional to the frequency of interference fringes in the image, which makes the frequency depend on the nature of the image being processed. Thus, with an increase in the spatial frequency of interference fringes, the proportion of high

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the frequency components at the output of differentiation unit 1, i.e. the voltage at the output of the frequency detector 10 increases. Consequently, the frequency at the output of the controlled oscillator 11 increases and, accordingly, the duration of the blocking pulses decreases. At the input of the adder 18 will already pass higher-frequency signals from the comparator 8.

Claims (1)

Invention Formula A device for contouring images of interferograms containing a series of first differentiation unit, the input of which is an input of a device for contouring interferogram images, a first adder, a second differentiation unit and a second adder, so as to improve the quality of contouring by reducing high-frequency noise, it introduced a serially connected low-pass filter, the input of which is combined with the input of the first block of differentiations, comparator, etc the angular input of which is connected to the output of the second adder, the delay unit, the element And and the adder with weighted inputs, the output of which is the output of the device for contouring the images of interferograms, the second and third inputs are connected respectively to the outputs of the first and second adders, and the fourth input combined with the input of the first differentiation unit, a frequency detector connected in series, the input of which is connected to the output of the first differentiation unit, a controlled pulse generator and a pulse distributor The first, second, third, and fourth D-triggers, whose outputs are connected to the second, third, fourth, and fifth inputs of the AND element, respectively, and the inputs to the comparator's output, as well as the first high-pass filter, whose input is combined with the input of the first differentiation unit, and the output is connected to another input of the first adder, and the second high-pass filter, the input of which is combined with the input of the second differentiation unit, and the output connected to another input of the second adder, with this D- input of the first D-flip-flop merged with the S-input of the second D-flip-flop and connected to the first output of the pulse distributor, D-input of the second D-flip-flop combined with the S-input of the third D-flip-flop and connected to the second output of the pulse distributor, D-input of the third D-flip-flop is connected but 106 with the S-input of the fourth D-flip-flop and connected to the third output of the pulse distributor, and the D-input of the fourth D-flip-flop is combined with the S-input of the first D-flip-flop and connected to the fourth output of the pulse distributor. fie. g FIG. five