SU1377786A1 - Device for checking digital nodes - Google Patents

Abstract

The invention can be used for group tests of numerical technique. The device comprises a test generation unit 1, a reference unit 2, a group 3.1 of comparison elements and an AND 5.1 element. Introduction of a register of 10 errors, And blocks 9.1 ... 9.N self-locking, N-1 elements And 5.2 ... 5.N, N-1 groups 3.2 ... 3.N comparison elements, connecting channel 11 and N + 1 groups 6.1 ... 6.N + 1 and transceivers consisting of 7.1 ... 7.N + 1 and 8.1 ... 8.N + 1 transceivers increases the accuracy and performance of the control. 2 Il.

Description

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The invention relates to electrical measuring equipment and can be used for group testing and control of digital computer components.

The aim of the invention is to increase the reliability due to the possibility of controlling nodes with faulty (for example, shunted to ground) input and the performance of the control due to the possibility of conducting group monitoring.

FIG. 1 shows a block diagram of the device; in fig. 2 - the cyclogram of his work.

A device for controlling digital nodes consists of a test generation unit (PC) 1, a reference block 2 for generating signals that are compared with signals from N controlled digital nodes connected to connection terminals 3.1-3.N, N groups of comparison elements, A.1-4 .N control objects that serve to compare signals from monitored nodes with signals from an external block 2, N elements AND 5.1-5.N, N + 1 groups 6.1-6.N + 1 of the first 7.1-7.N + 1 and the second 8.1-8 .N + 1 transceivers, N blocks 9.1-9. N self-blocking, used to hold information about the failure of the monitored digital About the node before the end of the test (the number of blocks 9.1-9.N of self-blocking must correspond to the number of monitored digital nodes), the register of 10 errors, designed to transmit information about the health of the monitored digital nodes in block 1.

For the connection of block 1 with N + 1 groups, transceivers, N blocks 8.1-8. N and a register of 10 errors, there is a connecting channel 11, which is the data transmission lines and control signals. At the same time, the inputs-outputs of the test generation unit 1 (computer) are connected via the connecting channel 11 to the input-outputs {1 + 1 groups 6.1-6.N of transceivers 7..N and with matching inputs of the first 7.1-7.N and the second 8.1-8.N transceivers of the same groups. The codes and inputs of the first transceivers 7.1-7.N groups are connected respectively to the inputs and outputs of the second transceivers 8.1-8.N e these groups. The inputs-outputs of the second transceiver 8 N + 1 groups are connected to the inputs-outputs of this

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2, Outputs of the first 7.1-7.N and second 8.1-8.N transceivers of N groups are connected respectively to the first and second inputs of 4.1-4.N comparison elements, the outputs of which are connected to the inputs N of AND 5.1-5.N elements. The output of the elements 5.1-5.5. Is connected to the input N of the self-locking blocks 9.1-9.N. The outputs of the self-blocking blocks 9.1-9.N are connected to the corresponding inputs of the register 10 errors, and the reset and synchronization inputs (NFC) of N blocks 9.1-9.N self-locking and the synchronization input of the DPT of the reference unit 2 and the output of the error register 10 through the first link channel 11 connected by inputs-outputs with test generation unit 1 (computer).

With group control of digital nodes, the device operates as follows.

The test formation unit 1 (v. Hereinafter the microcomputer) stores the test of tests under which the microcomputer performs control operations of the group test device and the control and checks the condition of the monitored units according to the corresponding test. Before the test of the microcomputer begins, the test command sends a reset signal through the connecting channel 11 to the reset input of N devices 9.1-9.N of self-blocking, the output of which is set to a logical zero, which corresponds to the health of the tested nodes.

Then the micro-computer, through the inputs-outputs and the connecting channel 11, supplies a control signal to the control inputs of the first 7.1-7.N + 1 and second 8..N + 1 N + 1 transceiver groups, which receive data from the loop in the write cycle channel 11 through the inputs-outputs and data transmission to the transceiver outputs 8.N + 1, and in the data reading cycle data is received from the outputs of block 2 and then through the input-outputs to the communication channel 11. The remaining N groups of transceivers are included in reception, i.e. in any cycle, they work only to receive data from the connecting channel 11 to the inputs-outputs and their transmission to the inputs of transceivers 8,1-8.N and the first inputs of N groups of elements 4.1-4.N compared to

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In the write cycle, data from the micro-EV through the linking channel 11, the first 7.1-7.N4-1 and the second 8.1-8.N + 1 N + 1 transceiver group are recorded in the reference block 2 and the monitored node, and in the read cycle of the reference 2 block through the transceivers 7. N + 1 and 8. N + 1 are fed through the connecting channel 11 into the microelectronics, as well as through the first transceivers 7.1-7.N to the first inputs of the 4.1-4.N elements of the comparison. At the same time, data from N controlled nodes through transceivers 8.1-8.N arrive at the second inputs of elements 4.1–4. N comparison and the signals are compared in pairs. If the data read from the reference block 2 and the monitored digital nodes coincided, then at the outputs of the N elements 4.1-4. N comparisons appear logical units that arrive at the inputs of the elements And 5.1-5, N, at the output of which Also, the logical unit, which, having arrived at the input of N elements 9.1-9, N of self-locking, confirms a logical stake at their output by the synchronization signal,

The operation of the element 9 self-locking (figure 1) is based on the analysis of the compared data on the synchronization signal DPT (figure 2).

The reference unit 2 (FIG. 1) and the monitored digital nodes transmit the AD1 data (FIG. 2) to the unit 1 (FIG. 1) by the synchronization signal of the DChT. On the falling edge of the PDT synchronization signal, the transfer of AD1 data (FIG. 2) from the N monitored digital nodes and the reference block 2 is stopped, but the falling edge of the PDT synchronization signal (FIG. 2) goes to the N blocks 9.1-9.N self-locking (FIG. 1 ) before the results of comparison of the data of AD2 (FIG. 2) at the inputs of N block 9.1-9 are removed. self-blocking (Fig. 1) due to the delay Tz "d (Fig. 2) introduced in the path of the AD1 data from the reference block 2 (Fig. 1) and N controlled digital nodes to the inputs N of blocks 9.1-9.N self-locking.

Thus, at the moment of arrival of the trailing edge of the DPT synchronization signal to N blocks 9.1-9.N, their inputs contain the true values of the results of data comparison, this

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The 2 unit with the data of N controlled digital nodes.

If at least one second input where any of the N elements 4.1–4. Comparison signal does not coincide with the signal of the first input, then at the corresponding output of this element there appears a logical zero, which, arriving at the input of the AND 5.1–5 element, N transfers its output to the state of logical zero, which, in turn, arriving at the input of block 9.1-9.N on the basis of the synchronization signal of PDT, translates its output to the state of logical one. This state is maintained even if a logical zero arrives at its input in the next cycle. The initial state can be set only by the micro command. The computer, having given a reset signal to the reset input of blocks 9.1-9, N. The state of blocks 9..N of self-blocking through the 10 error register, connecting channel 11 is found in the microcomputer, which, analyzing the state of the corresponding bits of the error register 10, determines the operable nodes, if the corresponding bit is zero, and inoperable - if unit Having determined the operable and v failed modules, the microcomputer performs the initial installation with a reset signal, and the test test begins anew. After each pass of the test, the microcomputer determines the operability of the modules and stores this data in its memory, and after completing the test for long-term operability, it displays information about the operability of all the monitored nodes.

Claims (1)

Invention Formula A device for controlling digital nodes, containing a terminal for connecting control objects, a test generation unit, a reference unit, a first group of comparison elements and an AND element, wherein the outputs of the first group of comparison elements are connected to the inputs of the AND element, characterized in that reliability and performance of the control, N-1 terminals were inserted in it to load control objects, error register, N self-locking blocks, N-1 elements And, N-1 groups comparison elements, the linking channel and N + 1 groups of transceivers containing each of the first and second transceivers, the first inputs-outputs of which are interconnected in the first group of transceivers, the second inputs-outputs of the first transceiver are connected to the inputs-outputs of the reference unit, and the second inputs The outputs of the second transceiver are connected to the corresponding first inputs / outputs of the communication channel, the first inputs of the first receivers and the corresponding second inputs of the comparison element groups, the control inputs of each transceiver in each group of transceivers are connected to the corresponding control outputs of the communication channel, the outputs of the And elements connected to the inputs of the corresponding self-blocking blocks, whose synchronization inputs are connected to the synchronization inputs of the terminals for connecting control objects and outputs synchronization of the communication channel, reset inputs transmitters in the next N locking groups. connected to the corresponding outputs of the coupling of the reciprocal channel, the information input of which is connected to the output of the error register, the inputs of which are connected to the outputs of the corresponding self-blocking blocks, the second inputs-outputs of the connecting channel are connected to the inputs-outputs of the test generation unit, and the control input of the reference block is connected to the output of the connection channel installation. transceivers are connected to the corresponding outputs of the communication channel, the outputs are connected to the corresponding inputs of the second transceivers in each group of transceivers and the first inputs of the respective groups of comparison elements whose inputs-outputs are connected to the corresponding terminals of the control objects, and the outputs to the second inputs of the first transceivers 1Д / 1Г) k (U (Data U ( LCH1 SZH1H EGZh11 FIG. 2 locking connected to the corresponding outputs of the coupling of the reciprocal channel, the information input of which is connected to the output of the error register, the inputs of which are connected to the outputs of the corresponding self-blocking blocks, the second inputs-outputs of the connecting channel are connected to the inputs-outputs of the test generation unit, and the control input of the reference block is connected to the output of the connection channel installation. 7