SU1361585A1 - Logarithmic converter - Google Patents

Abstract

The invention relates to devices for converting electrical signals according to a logarithmic law and can be used in analog computers and information technology. The purpose of the invention is to improve accuracy, which is achieved by introducing three correcting transistors 7-9 and exponential transistor 3. This reduces the effect of imperfect parameters of the elements of the compensation circuit of the base resistance of the logarithmic transistor 2 on the conversion result, turning on the current inversion unit 13, having a current output the magnitude of the current of which in the whole range of the output signals of the converter is proportional to the change in the base current of the logarithmic transistor 2, and the connection its base the second scaling resistor 6 allow excluding chain emitter - base of transistor 2 logarithmic any parasitic voltage sources, which is particularly sensitive to the current-voltage characteristics of a semiconductor junction. 1 il. (L 10 5 "MIDP from 05 SP 00 ate

Description

The invention relates to devices for converting electrical signals according to a logarithmic law and can be used in analog computers and information technology.

The purpose of the invention is to increase accuracy.

The drawing shows a diagram of a logarithmic converter.

The converter contains an operational amplifier 1, a logarithm 2 and an exponential 3 transistors, a source 4 of the reference voltage, the first 5 and second 6 large-scale resistors, three correcting transistors 7-9, the input 10 and the output 11 of the converter, the power bus 12, and the first 7 and second 8, the correction transistors perform the functions of the current inversion unit 13.

The logarithmic converter works as follows.

The logarithmic relationship between the input (input 10) and output (output 11) voltages is provided by using the natural non-linear dependence of the collector current of the logarithmic transistor 2 and the voltage at its zmitter junction

and, 5 - (Lf.ln U ,, / R5.

lo, -,

-5,) (1)

, 026 V is the temperature potential;

1e, RJ - respectively, the thermal current of the emitter junction, res. the base of the log transistor)

R J - the resistance of the first large-scale resistor 5.

the fall of the voltage on the resistance of the logarithmic transistor 2

R 5 I g is the cause of the error in the area of high operating collector currents.

To compensate for this error, the base of the logarithmic transistor 2 is connected to the zero potential bus via the second large-scale resistor 6, and the output of the current inversion unit 13 is connected to their common output, the current of which is proportional and opposite in direction to the base current of the logarithmic transistor 2. Formation of the current.

proportional to the current base of the logarithmic transistor 2, is implemented using identical logarithmically transistor 2 exponential 3 and the third corrective 4 transistors. Since the magnitude of the compensated voltage drop on the bulk base resistance is small

and usually does not exceed 1 mV, the voltages at the zmitter transitions of the logarithm 2 and exponential 3 transistors differ by the voltage of the source 4 of the reference

voltages and their collector currents

and i; are proportional to: exp and

3

 I.

TO.

(2)

0

1 3 - g 4

where K is the scaling factor of the collector current of the logarithmic transistor 2. Due to the identity of the exponential 3 and the third corrective 9 transistors, their base currents can be considered equal, from which the base current of the third correcting transistor 9

H

TO.

(3)

Sj 4 Block 13 current inversion provides at its output a current that is proportional to its input current, but opposite to it in direction. Therefore, the voltage on the base of the logarithmic transistor 2 is determined by the voltage drop across the second large-scale resistor from the flow of the total current of this transistor and the output current of the current inversion unit 13.

 -Rt (i, -K4-Kn-i -,),

Where

cd

fj-i J ()

block transfer coefficient 13;

R (, is the resistance of the second scale resistor 6.

The voltage at the output 11 of the converter is equal to the sum of the voltage drops at the emitter junction of the logarithmic transistor 2 and the second large-scale resistor 6:

and ,, -R, .l5, j (1-K, -K ,,)

(at In-L G 1o1

+ R,

:.,) (five)

Providing conditions for R, (K, .K ,, - 1) Rg

 R

(6)

31

the voltage at the output 11 of the converter does not depend on the resistance of the base of the logarithmic transistor 2:

and ,, and „

01

The resistance value of the second scale resistor 6 is determined from the condition (6):

p Rcfi k, k, z-T

The conditions of physical realizability (the positive value of the second large-scale resistor 6) is provided when

K. K, 7 1. (8)

The first 7 and second 8 correcting transistors are identical in parameters and have the type of conductivity opposite to the logarithmic 2, exponential 3 and the third correcting 9 transistors. If we neglect the difference between the collector and emitter currents, then, taking into account the sequential switching on of transistors 7 and 8, their base currents 1 f are proportional to each other

-B "/ bvi. -TO

ii

(9)

 - ST f where Bg, B - transfer coefficients of transistors 8 and 7.

In case of use in the converter circuit of integrated transistor assemblies, compensation of the effect of the basic resistance of the circuit is carried out individually for each sample and is reduced to adjusting the coefficient of proportionality K between the currents of the first 2 and second 3 transistors using the reference voltage source 4 or, if set by Comp. N. Zaitsev Editor I.Nikolaychuk Tehred A. Kravchuk Proofreader N. Korol

Order 6293/50 Circulation 671 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, st. Project, 4

3615854

the base offset of the exponential transistor 3 in accordance with the condition (8), the adjustment of the second mainstand of the head resistor 6,

Formula FROM Gain

:

ten

15

YU

The logarithmic converter, containing the 1st operational amplifier, connected to the output of the converter, and the input through the first large-scale resistor to the converter input, a logarithmic transistor connected to the collector and emitter, respectively, to the input and output of the operational amplifier, through the second large-scale resistor to the input bus and the output of the operational amplifier. a zero potential source of corrective voltage, characterized in that, in order to increase accuracy, three corrections are introduced into it their transistor 25 and the exponential transistor connected by the emitter and the base respectively to the output of the operational amplifier and the output of the source of the correction voltage, the base and the collector of the first correcting transistor are connected respectively to the base of the logarithmic transistor and the zero potential bus, connected to the collector of the second one corrective transistor connected to the base and the emitter, respectively, with the base and collector of the third corrective transistor , the collector and emitter of which are connected respectively to the power bus and the collector of the exponential transistor.

thirty

35

40

Claims (1)

Claims Logarithmic Converter, 10 containing an operational amplifier connected by the output to the output of the converter, and the input through the first scale resistor with the input of the converter, the logarithm of the trans 15 a resistor connected by a collector and an emitter to the input and output of the operational amplifier, the base of the logarithmic transistor is connected to the zero potential bus through a second scale resistor, a correction voltage source, characterized in that, in order to increase accuracy, three correction transistors and an exponential a transistor connected by an emitter and a base, respectively, with the output of the operational amplifier and the output of the source of correction voltage, the base and collector of the first corrector a transistor connected respectively to the base of the logarithmic transistor and a bus of zero potential, the emitter of the first correction transistor is connected 35 to the collector of the second correction transistor, connected by the base and emitter to the base and collector of the third correction transistor, respectively, the collector and emitter of which are connected to the power bus and collector of the exponential transistor, respectively.