SU1327174A1 - Apparatus for digital record-playback of speech information - Google Patents

Abstract

This invention relates to the accumulation of information. The purpose of the invention is to reduce the time to access recorded voice information. In playback mode, the digital code from the outputs of the dynamic memory element 1 and dynamic dynamic memory elements 19 is supplied to digital-to-analogue converters 5 and 20, which convert it into a speech signal, respectively, to the output information bus 6 and information bus 25. 1 il. P I j ;;.

Description

 one

The invention relates to the accumulation of information, namely, devices for digital recording and reproduction of voice information.

The aim of the invention is to reduce the time to access recorded voice information.

The drawing shows the proposed device for digital recording and reproduction of voice information, an option.

The proposed device contains a dynamic dynamic memory element 1, connected by a row address fixing input, a column address fixing input, and a write enable input to the first, second, and third outputs of the control driver 2, respectively, connected to the input bus 3 of the clock signal, connected to the clock input of the analog-to-digital converter 4, to the clock input of the digital-to-analog converter 5, which is connected by the output and information input to the output bus, respectively 6 and exit information element 1 dynamic RAM memory and to the count input address counter 7, an address multiplexer 8, the decoder 9, the first, second and third elements of OR 10, 11 and 12, the switch 13 and the trigger 14 entries. Adrenal counter 7 is connected to the outputs of the young

  Our bits are equipped with information inputs of an address multiplexer 8 connected by a control input to the fourth output of a driver 2 of control pulses and connected by outputs to address inputs of a dynamic dynamic memory unit 1. The decoder 9 is connected by outputs to control output buses 15 and connected by inputs G to the outputs of the higher bits of the address counter 7, one of which is connected to the first input of the first element OR 10. Switch 13 is connected by the first information input to the output of the analog-digital converter 4 connected by the information input to microphone 16 and connected by a control input to the output of trigger 14 for recording. The first entry of the recording trigger 14 is connected to the input bus -17 of the recording mode setting connected to the first input of the second element OR 11 connected by the output to the input of the logical

74. 2 zero of the address counter 7. The third element OR 12 is connected by the first input to the input bus 18 to set the playback mode.

The device also contains additional dynamic dynamic memory elements 19 connected in series between the output of the switch 13 and the information input of the dynamic dynamic memory element 1 connected by the row address fixing inputs, the column address fixing inputs and the write enable inputs of the imaging unit, respectively 2 control pulses and connected by address inputs with the codes of the address multiplexer 8, additional digital-to-analog converters 20, bl 21 comparing to, register 22, multiplexer 23 and flip-flop output data 24 read. Additional digital-to-analog converters 20 are connected by clock inputs to the input bus 3 of the clock signal and are equipped with additional information buses 25 connected to their outputs. The comparator unit 21 is connected by inputs to the outputs of the higher bits of the address counter 7 and connected to the second input of the first element OR 10 connected to the second inputs of the recording trigger 14 and the second element OR 11 by the output to the input input bus 17 of the mode setting recording and connected to the second input with the output of the third element OR 12, connected by the second input to one of the outputs of the decoder 9. The multiplexer 23 of the exhaust information is connected by the output to the second information input of the switch 13. The output of dynamic dynamic memory element 1 is connected to the information input of output information multiplexer 23 connected by other information inputs to the outputs of additional dynamic memory functional elements 19 connected to information inputs of additional digital-analog converters 20. Register 22 is connected to information inputs to outputs address bits 7, is connected to the clock input with the output of the trigger 24 read and connected to the outputs

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other inputs of the comparison unit 21 and to the control inputs of the output multiplexer 23.

Digital recording-reproduction of speech information through the proposed device is as follows, I

To set the write mode, a short-term logical level drop from the input bus 17 of the setting mode sets the address counter 7 to the zero state via the second OR 11 element, flips the read trigger 24 and sets the write trigger 14 to the state in which the switch 13 switches output of the analog-digital converter 4. to the first additional element 19 of the operative dynamic memory. In this case, the read trigger 24 transfers the register 22 to the tracking mode at its outputs of the respective input signals. According to the clock signal from the input bus 3 clock signal, the driver of the 2 control pulses produces control pulses fed to the additional dynamic memory elements 19, the dynamic dynamic memory element 1 and the address multiplexer 8. The clock signal is also fed to the digital clock. - tax converter 5, to additional digital-to-analog converters 20, to analog-to-digital converter 4 and to address counter 7, According to the clock signal of the speech information from microphone 16, nalogo-digital a converter 4 into a digital code signal via the switch 13 to the first further element 19 of the dynamic RAM memory is a sequential filling v.kotorom jHHe its memory cells. During the next cycle of sequential access to the cells of the first additional dynamic memory element 19, the second additional dynamic memory element 19 is filled with a digital code recorded in the first additional dynamic memory element 19 during the first circulation cycle. During subsequent cycles, the following additional elements are filled in with the digital code

one

5 0 5 0 5 0 5 0 g

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19 of the dynamic memory and the element 1 of the dynamic dynamic memory. In this case, the code from the outputs of the higher bits of the address counter 7 passes through the register 22 to the output information multiplexer 23, and also goes to the comparison unit 21 and to the decoder 9. When forced into the playback mode, a short-term logical level difference from the input bus 18 to set the playback mode through the third element OR 12 translates the read trigger 24 into the state providing at the outputs of register 22 the code of the number of that additional element 19 of the dynamic memory or element 1 of the operative memory The memory memory to which the recorded digital code has been moved. At the same time, the output multiplexer 23 is fixed in a state in which information from the corresponding additional dynamic memory element 19 or dynamic dynamic memory element 1 passes to the switch 13, and the number code received from the register 22 to the comparison unit 21 is set to fixed state. Upon completion of the access cycle, the higher-order bits of the address counter 7 output to the comparison unit 21 a code of the number that exceeds the number of the register 22, the comparison unit 21 generates a logic level, which through the first element OR 10 takes the trigger 14 of the record to the state providing information from the output multiplexer 23 through the switch 13 to the first additional element 19 of the operational dynamic memory, and through the first and second elements SHS 10 and 11 converts the address counter 7 to the initial state of.

When automatically switching to the playback mode, the address counter 7 through the first element OR 10 resets the recording trigger 14, and through the first and second elements OR 10 and 11 is brought to its initial state. Due to this, the output of the element 1 of the operational dynamic memory is connected to the first additional element 19 of the operational dynamic memory through the output information multiplexer 23 and communi- cation

At the outputs of the register 22, a code of the number 1 of the element 1 of the operative dynamic memory is fixed, which is fed during the playback mode to the output information multiplexer 23 and to the comparison unit 21. The fixing of the code of the element number 1 of the dynamic memory at the outputs of the register 22 is performed by a logic level received from the read trigger 24, which is transferred to the corresponding state via the third element OR 12 by the decoder 9.

In digital playback mode

the code from the outputs of element 1 of the operative dynamic memory and additional elements 19 of the operative DS memory is fed to the diffro-analogue converter 5 and to the additional digital-to-analogue converters 20, which convert it into a speech signal supplied respectively to the output bus 6 of information and for additional output tires 25 information.

Claims (1)

Invention Formula A device for digital voice playback of voice information, containing an element of dynamic dynamic memory, connected by the input of fixing the row address, the input of fixing the address of the column and the input of recording resolution, respectively To the first, second and third outputs of the driver of control pulses connected by the input to the input bus bar connected to the clock input of the analog-to-digital converter, to the clock input of the digital-to-analog converter and the counting input of the address counter, the outputs The lower bits of which are connected to the information inputs of an address multiplexer connected by a control input to the fourth output of a control equalizer and connected by outputs to the address inputs of a dynamic memory unit whose output is connected to an information input of a digital-analog converter connected to output-: information bus, decoder, connected by outputs to control output buses and connected input with O five 0 5 0 d 5 0 5 1746 Dami to the output bits of the address counter, one of which is connected to the first input of the first OR element, a switch connected by the first information input to the output of the analog-digital converter connected to the microphone input, and connected by the control input to the output a recording trigger connected by the first input to the input bus of the recording mode setting connected to the first input of the second OR element, the output of which is connected to the input of the logical zero setting of the address counter, and the third an OR element connected by a raw input to the input bus of the playback mode setting, characterized in that, in order to reduce the access time to the recorded voice information, additional elements of the dynamic dynamic memory are inserted in it, connected in series between the output of the switch and the information input of the operational element dynamic memory, connected by the row address latch inputs, column address latch inputs, and write enable inputs, respectively, to the first, second, and third outputs control pulse generator, and connected by the address inputs with the outputs of the address multiplexer, additional digital-to-analogue converters connected. clock inputs to the input clock bus and supplied connected to their outputs with additional information output buses, a comparison unit connected by inputs to the higher-order address counter and connected to the second input of the first OR element connected by the output to the second inputs of the write trigger and the second OR element, connected to the second input the input pin of the recording mode setting and the connected second input with the output of the third of its OR element, connected by the second input to one of the decoder outputs, the multiplexer is output information output connected to the second data input of the switch, and a register, the output of the operational member dnnag-tcheskoy memory coupled to the data input of the multiplexer output information Ack 713271748 connected to other informational devices of older bits of address inputs to the outputs of the additional ele-counter, connected by a clock input to Copies of an operational dynamic memory output of a read trigger and a sub type, connected to information inputs connected to other inputs I will give additional digital-to-analog 5blocks of comparison and to control transducers, and the register of multiplexer sub-outputs will be given informational inputs for you.