SU1320730A1 - Appliance to eddy current flaw detector for excluding signals from ends of elongated articles - Google Patents

Abstract

The invention relates to non-destructive testing of materials and products and can be used to eliminate interfering signals from the ends of long products, such as pipes. The aim of the invention is to increase the reliability of the control of the flaw detector in automatic mode by reducing the uncontrolled area at the ends of the product. When inspecting long items, a signal from a gross defect triggers amplitude selectors 2, 3 or 1 and 4 depending on its polarity and enters the coincidence circuit 9, as a result, a trigger 10 is set and a control signal is issued on the presence of a defect on the flaw end units. Since the blocking sensor 13 is located outside the primary converter, a large uncontrollable zone is formed at the end of the product. To reduce it, a one-shot 14 is used, the signal of which is transmitted through the circuit OR 15 to the inhibitor circuit 11. If the defects are located near the end of the product, then the amplitude selectors 1 and 4 are activated, the signal from which passes through the coincidence circuit 9 and triggers the trigger of trigger 10. 2 Il. cl

Description

The invention relates to non-destructive testing and can be used in determining the quality of long products such as rods, pipes, etc.

The aim of the invention is to increase the reliability of the control of the instrument in automatic mode by reducing the uncontrolled area at the ends of the product.

FIG. 1 shows a block diagram of the device; in fig. 2 - signal plots at control points of the device.

The device contains four amplitude selectors 1-4, the scheme OR 5, connected to the outputs of the amplitude selectors 1 and 4, differentiating circuit 6, included 10

and on the direct outputs of the flip-flops 8 and 10 there is a logical zero, from the lock sensor 13 to the one-shot 14 and the OR 15 circuit a logical zero is fed, and from the trigger 8 to the match 9 also a logical zero is fed. In the unexcited state, the outputs of the single vibrators 7, 12, and 14 have a logical zero, and from the output of the OR 15 circuit, the prohibition circuit 11 supplies a logical zero. When the product enters the converter (not shown), the output of the flaw detector shows a positive voltage drop 16 from a minus value to zero, which is external between the combination of the Current amplitude of the pulse 17 of positive selectors 1 and 4 and the combined "And the polarities at the output of the differential inputs of the amplitude selectors 2 and 3, connect, while the signal 17 causes the consecutive one-oscillator 7 in succession, the amplitude selector 2 stalls, and the sigger 8, coincidence circuit 9, to the second - amplitude selek torus 1. Due to the input of which the output of the OR ™ ™ GO circuit is connected, the lock sensor 13 is located 5 and the trigger 10 connected in series 20 in front of the converter, then at the input of the inhibit device 11 connected to the output of the converter from the output of sensor 13 of the amplitude selector 3 The blocking output is supplied with a logical signal 18 connected to the second input of the trigger 8, and the units through the OR circuit .15 The vibrator 12, the output of which connects the inhibit signal 20 to the circuit 11 with the second trigger input 10. . The leading edge of the impulse pulse 21 also includes a lock sensor 13 connected in series, a one-shot 14 and an OR circuit 15, the second input of which is connected to the output of the lock sensor 13, and the output connected to the second input of the inhibit circuit 11.

Diagram 16 (Fig. 2) shows signals from the beginning and end of the product and from various types of defects at the output of the flaw detector (not shown), and diagram 17 shows the output signal of differentiating value 6, diagram 18 shows the output signal of blocking sensor 13, diagram 19 shows the output the one-shot signal 14, the diagram 20 —the output signal of the circuit OR 15, which is a inhibitory signal; the diagram 21 — the output signal of the amp. explorer selector 2, diagram 22 - output signal of amplitude selector 3, diagram 23 - output signal of one-shot 7, diagram 24 - output signal of the circuit OR 5, coming from amplitude selectors 1 and 4, having different polarity thresholds of the 45-th and trigger 8 is not translated into priming, diagram 25 - allowing the initial state (plot 2o). However, the signal at the output of the trigger 8, diagram 26 is the output signal of the coincidence circuit 9, arriving at the single input of the trigger 10, diagram 27 is the output signal of the restriction circuit 11 from the end diagram 28, the output signal of the one-shot 12, diagram 29 is the output signal

the pacing selector 2 triggers a one-shot 7, whose pulse 23 triggers the trigger edge 8. Thus, at the second input of circuit 9, a logical unit appears with a delay, and 30 the signal 24 of the OR circuit 5 does not pass to the output of circuit 9 and does not translate trigger 10 in one state. The delay time of the one-shot 7 is determined by the end time of the signal from the beginning of the product.

Signal from a gross defect triggered by amplitude selectors 2, 3, and 1 or 4, depending on the polarity of the signal, depending on the position of the defect on the end. controlled product.

The front edge of the pulse 22 and the amplitude selector 3 would have to start the one-shot 12, but since at this moment the prohibiting pulse 20 acts on the input of the inhibit circuit 11, the single-vibrator 12 remains in the unexcited state

40

flaw detector at the direct output of the trigger 10, which carries information about the presence of defects.

the signal from the gross defect (the second and third pulses in diagram 16) triggers the amplitude selectors 1 and 4, the output pulses of which pass through the product OR 5 circuit (plot 24) and arrive at the input of circuit 9 and match 9 output (plot 26), since at its second input there is a pulse 25 of the trigger 8. The pulse 26 of the circuit 9 coincides translates

zo.m.

,, „, its trigger 10 in a single state (ePYuU works as follows:„ 29)

the absenceSo as the sensor 13 is blocking the arrangement. wives outside the transducer, it turns out

In the initial state (with the product) at the output of the sensor 13

the occurrence of the pulse 17 is positive and the polarity at the output of the differential, while the signal 17 triggers the amplitude selector 2, and the sig signal triggers the amplitude selector 1. Due to the GO, the blocking sensor 13 is located in front of the converter, At the entrance of the product- “converter” from the output of the blocking sensor 13, a signal 18 of the logical unit is fed which through the OR circuit .15 outputs the inhibit signal 20 to the interdiction circuit 11. The front of the pulse is 21 am-

This research and trigger 8 is not transferred to the initial state (plot 2o). but

the pulsatile selector 2 starts a one-shot 7, a pulse 23 of which trails the back-up trigger of trigger 8. Thus, at the second input of circuit 9, the logic unit appears with a delay, and the signal 24 of the circuit OR 5 does not pass to the output of circuit 9 and does not translate the trigger 10 in one state. The delay time of the one-shot 7 is determined by the end time of the signal from the beginning of the product.

Signal from a gross defect triggered by amplitude selectors 2, 3, and 1 or 4, depending on the polarity of the signal, depending on the position of the defect on the end. controlled product.

The front edge of the pulse 22 and the amplitude selector 3 would have to start the one-shot 12, but since at this moment the prohibiting pulse 20 acts on the input of the inhibit circuit 11, the single-vibrator 12 remains in the unexcited zone

large uncontrolled area at the end of the product. To reduce the uncontrolled area, a single vibrator 14 is applied, which is triggered by the falling edge of a pulse 18. The pulse duration 19 of the single vibrator 14 is inversely proportional to the speed of the product through the converter and is determined by the formula

where, is the pulse duration;

L is the distance from the blocking sensor to the converter;

V - speed control.

Due to this, the inhibit signal 20 of the circuit OR 15 is equal to the sum of the signals 18 and 19.

If the defects are located near the end of the product (fourth and fifth pulses in diagram 16), then amplitude selectors 4 and 1 are activated, the output pulses of which pass to the output of circuit 9 of coincidence, since the second impulse allows the triggering impulse 25 of trigger 8 .

The pulse on the diagram 16 from the end of the product, through a differentiating circuit 6 (plot 17), triggers the amplitude selector 3 (plot 22). The output signal passes to the output of the prohibition circuit 11 (plot 27), so at its prohibitory input there is a logical zero (plot 20). The leading edge of the pulse 27 starts the one-shot 12, and the trigger 8 is brought to its initial state (plot 25). By the falling edge of the pulse 28 of the single vibrator 12, the trigger 10 is reset.

A signal from the output of coincidence circuit 9 (plot 26) carries information about the defect and its length and is used to mark

0

five

0

five

0

five

defective areas, and the falling edge of the pulse 29 of the flip-flop 10 carries information about the presence of a defect and is used to start the output unit actuator (not shown).

Claims (1)

Invention Formula A device for an eddy current flaw detector to exclude signals from the ends of lengthy products, containing three amplitude selectors, a one-shot, a OR circuit connected in series a second single vibrator connected to the output of the second amplitude selector, a trigger and a matching circuit, and a second trigger whose output is the output of the device , characterized in that, in order to increase the reliability of the control of the flaw detector in automatic mode, it is equipped with a fourth amplitude selector connected between the input of the first the amplitude selector and the first input of the OR circuit, the second input of which is connected to the output of the first amplitude selector, and the output of the OR circuit is connected to the second input of the coincidence circuit by a differentiating circuit connected between the input of the first amplitude selector and the combined inputs of the second and third amplitude selectors connected in series with a sensor blocking, the third one-shot, the second OR circuit, the second input of which is connected to the output of the lock sensor, and the prohibition circuit, the second input of which is connected to the output House third amplitude selector and an output connected to a second input of the first flip-flop and through a first monostable multivibrator - to the input of the second flip-flop, a second input of the second flip-flop connected to the output of matching circuit. True Dvtekgpy from start 18 nineteen 20 21 22 23 2 " 25 26 27 26 29 (Reg. 2