SU1295522A2 - Shaft turn angle-to-digital converter - Google Patents

Abstract

The invention relates to the field of automation, telemechanics, computer technology, can be used in computer numerical control systems, in machine drives, industrial robots and is an improvement of the invention in a.s. No. 1076934. S. the goal is to increase the reliability of the converter by monitoring its operation in a converter containing a pulse generator 1, the first II and second 2 switches, a divider 3 frequencies, a source of power supply 4 of the phase rotator, a phase rotation clock 5, the first 6 and the second 7 drivers phase pulses, the first 13 and second 8 phase discriminators, counter 9, counter 10 with variable division ratio, first 12 and second 15 reversible counters, drive 14, entered the control code setting block 16 and the OR element 17. The control code setting block 16 holds four D-flip-flops, two And elements, a frequency divider and an inverter, Second switch 2, divider 3 frequencies, phase 4 power supply source 4, second phase impulse generator 7, second phase discriminator 8 and counter 9 form a phase shifter system of input voltage of phase shifter 5 relative to the output signal of the counter 9. The first force (L

Description

Concro tro code

C) and 11

The global phase pulse generator 6, the first phase discriminator 13, the first 12 and second 15 reversible counters, the counter 10 with a variable division factor and the first switch 1I form the phase-locked loop system of the output voltage of the phase shifter 5 relative to the input voltage. The output code is formed in the accumulator 14. The information inputs of the block 16 are supplied. The invention relates to the field of automation, telemechanics, computer technology, can be used in computer numerical control systems, in drives of industrial machines of robots, and is an improvement of the invention according to the author. St. No. 1076934.

The chain of the invention is to increase the reliability of the converter by monitoring its operation.

KA of FIG. 1 is a block diagram of a converter; FIG. 2 is a block diagram of the task of the control code,

The converter (Fig. 1) contains a pulse generator 1, a switch 2, a divider 3 frequencies, a phase shifter power source 4, a phase shifter 5, a first 6 and a second 7 phase pulse shaper, a phase discriminator 8, a counter 9, a counter 10 with a variable division factor, a switch 11, the first reversible counter 12, the phase discriminator 13, the accumulator 14, the second reversible counter 15, the I6 block of the control code, the element OR 17.

The control code setting unit 16 (FIG. 2) contains first 18, second 19, third 20 and fourth 2i triggers, first 22 and second 23 And elements, frequency divider 24 and inverter 25.

Generator 1 is designed to form two high-frequency pulse sequences that do not coincide in time. The divider 3 of the frequency counter 9 and the first reversible counter 12 represent the standard defined number of pulses that shift the output signal of the counter 9 in phase, which is worked out by both systems of automatic adjustment. As a result, At the output of accumulator 14, a code is generated equal to the number of pulses fed to the corresponding input of block 16, which indicates that the converter is operational. 1 z.p f-ly, 2 ill.

These are reversible counters with a division factor of N 2, where n is the number of binary bits.

The power supply source 4 of the phase shifter consists of an active filter, which extracts the first harmonic signal from the output of the divider 3j and the power amplifier to power the windings of the phase shifter 5. Rotating transformers, power circuits can be used as the phase shifter 5; Resolvers, Inducosin, etc. The formers of 6 and 7 phase pulses can be made on the basis of voltage comparators. The phase discriminators 8 and 13 are intended for switching a pulse arriving at the first input to one of the outputs depending on the logical value of the signal at the second input;

Switch i1 is intended for switching pulses from the output of counter 10 to the summing inputs of the first reversible counter 12 and accumulator 14 with a positive code sign in the counter 15 or to the subtractive inputs of the counter 12 and accumulator 14.

Block 16 (fig.2) is designed to transmit the control code in Counter mode to the converter.

The angle Converter in the code works as follows.

In the mode of converting the angle into a code, the pulses from the first output of the generator I with the frequency f through KOMi iyTaTop 2 fill the signal generator 3. A phase shifter power supply 4 converts a reference signal of f / N frequency from a divider 3 frequency v-sensor to a two-phase harmonic voltage

No phase shifter 5. The voltage from the output of the phase shifter 5, shifted in phase by an angle proportional to the angle of rotation of the axis of the shaft of the phase shifter, is fed to the input of the first generator of the phase pulse 6, the output of which produces a short pulse at the moment the input voltage passes from negative area to positive. The output pulses of the former 6 are fed to the first input of the first phase discriminator 13, to the second input to which the pulses come from the higher bit of the first reversing operating temperature, the converter contains a correction circuit including the second driver of 7 phase pulses, the second 5 phase discriminator 8, the second switch 2, the element IL 17 and the counter 9. The work of the correction circuit is similar to the considered work of the signal phase measurement loop during the rotation of the shaft of the phase shifter. Pulses from the first output of the generator 1 person. The second switch 2 is cut to the summing input of the divider 3 frequencies and through the element OR 17 to the summing counter 12, whose frequency is equal to the 5th input of the counter 9. The second is formed by the frequency of the power supply signal of the phase rotator. At the initial time, the axis of the shaft of the phase shifter 5 is stationary, the drive 14 and the counters are reset, so the signal from the output of the first reversible counter 12 coincides in phase (with an accuracy of one frequency period f / N) with the output signal of the phase shifter 5.

Phase pulse generator 7 generates short pulses from the power signals of the phase shifter 5 when the supply voltage of the phase shifter passes from the negative to the positive region, which arrive at the first input of the second phase discriminator 8. The second input of the second phase discriminator 8 receives pulses with slow turning shaft phase j stroke of the counter 9, the frequency of which is equal to the frequency of the power signal of the phase shifter.

In the mode of converting the angle to the code, the control system does not work, and in the positive direction of output 5, the signal from its output begins to outpace the signal from the output of the first reversible counter 12. The phase discriminator 13 sends the phase-30 signal of counter 9 to have stable pulses summing input frequency and phase. If the phase of the second signal-reversing counter is 15. When the power supply of the phase shifter 5 changes at the output of the counter 10 from variable to-itf due to destabilizing division factor, factors appear that the phase discriminator B Comm-35 cut the second switch 2 adds the importer 11 to the pulses to the summing input of the divider of the generator 1 to the summing input of the counter 12, which leads to a phase shift of the signal at the output of the counter 12

with respect to the signal at the output of the phase of the signal at the source 4. With the transducer 5. At the same time, the first phase of the power supply signal, the phase shifter 11 directs these pulses to the summing input of the accumulator 14.

When the shaft of the phase shifter 5 rotates in the negative direction, the work of the converter 45 is similar to that considered, and the negative change in the phase of the signal at the output of the counter 12 and.

3 frequencies, due to which the phase of its output signal is shifted in such a way as to compensate for the departure of fascatept 5 by the value of q Cf, the operation of the phase stabilization system is similar to that described.

In this case, the magnitude of the phase shift of Source 4 does not affect the accuracy of converting the angle of rotation of the shaft of the phase shifter to the code.

The accumulator code 14 is performed by the switch 11 by applying pulses of the counter 10 to the subtractive inputs of the reversible counter 12 and the accumulator 14.

50 In the control mode, the converter to the input of the I6 block is set to K pulses simulating movement. In block 16, the input pulses are synchronized. If there are pulses 51 ... 55 ow on one input bus of the converter, the synchronized pulses from the output of block 16 through the OR element 17 arrive at the summing input of counter 9, shifting its output signal phase to

the angle in the code due to the phase change of the power signals of the phase shifter i uqi, arising under the influence of destabilizing factors in the

In terms of operating temperatures, the converter contains a correction circuit, which includes the second driver 7 phase pulses, the second phase discriminator 8, the second switch 2, the IL 17 element and the counter 9. The operation of the phase correction signal during the rotation of the phase rotator . Pulses from the first output of the generator 1 person. the second switch 2 is cut to the summing input of the divider 3 frequencies and through the element OR 17 to the summing input of the counter 9. The second

Phase pulse generator 7 generates short pulses from the power signals of the phase shifter 5 when the supply voltage of the phase shifter changes from the negative to the positive region, which arrive at the first input of the second phase discriminator 8. The second input of the second phase discriminator 8 receives pulses from the frequency of the power signal phase shifter

In the mode of converting angle to code, the control system does not work, the output signal of counter 9 has a stable frequency and phase. If the phase of the power signal of the phase shifter 5 changes from-to-itf due to destabilizing factors, the phase discriminator To the second switch 2 adds pulses to the summing input of the divider

The counter 9 signal has a stable frequency and phase. If the phase of the power signal of the phase shifter 5 changes from-to-itf due to destabilizing factors, the phase discriminator To the second switch 2 adds pulses to the summing input of the divider

3 frequencies, due to which the phase of its output signal is shifted so as to compensate for the departure of the phase of the signal at source 4. When the phase of the signal of the phase supply signal changes

Figure 5 on the value of d Cf the work of the phase stabilization system is similar to that described.

In this case, the magnitude of the phase shift of Source 4 does not affect the accuracy of converting the angle of rotation of the shaft of the phase shifter to the code.

50 In the control mode, the converter to the input of the I6 block is set to K pulses simulating movement. In blo51

To discrete. The correction circuit / shifts the K phase of the output signals of the 3 frequency divider, the power supply source 4 and the phase shifter 5 by the Phase. The phase shift of the output signal of the phase rotator 5 causes the code in the I4 drive to change to K discrete. Based on the result of comparing the accumulator code I4 with the number of input pulses of block 16, it is judged that the transducers are in good condition, which increases the reliability of the transducer when operating in the angle measurement mode.

Invention Formula

Claims (2)

1. Convert the angle of rotation of the shaft into a code according to auth.St. No. 1076934, which refers to the fact that, with f5 2. The converter according to claim 1, T - characterized in that the control code setting block contains the first, second, third and fourth triggers, the first and second elements, and the frequency divider and inverter, the C-inputs of the first and second triggers are the information inputs of the control code setting block, the D inputs of the first and second triggers are connected to the power bus, and the outputs are connected to the D inputs of the third and fourth triggers, respectively, the forward outputs of which are connected to the first inputs of the first and second elements, respectively And, and 9P In order to increase the reliability, the conversion-inverse outputs - to the R-inputs of the matchers, are entered into it. Blob for setting the control code and the RSHI element, the first. On the second outputs, the generator of the pulse generator is connected respectively to the first input of the SHW element and to the synchronizing input of the control code setting block, information 1 to 1 inputs of which are the input buses of the converter, one output of the control code setting block is connected to the second input of the OR element, the output of which is connected .g Compiled by A.Smirnov Editor S.Patrusheva Tehred L.Serdyukova Proofreader 0.Lugov Order 628У62Тира 902Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., 4. whose output is to the summing input of the counter, and another output of the code setting unit. The control is connected to the subtractive input of the counter. . 2. The converter according to claim 1, T - characterized in that the control code setting block contains the first, second, third and fourth triggers, the first and second elements, and the frequency dividers and the inverter, the C inputs of the first and second triggers are the information inputs of the control code setting block, the D inputs of the first and second triggers are connected to the power bus, and the outputs are connected to the D inputs of the third and fourth triggers, respectively, the forward outputs of which are connected to the first inputs of the first and second And elements, respectively Respectively, the first and second triggers, the input of the frequency divider is the clock input of the control code setting block, the output of the frequency divider is connected to the second inputs of the first and second And elements and through the inverter to the C inputs of the third and fourth triggers, and } are angry, respectively, with the first and second outputs of the control code setting block.